Re: [Ktechlab-devel] Bug in flip flop?

[Thomas W. <ma...@th...>]

You're right, the D-state should be taken with the rising clock edge. Or, in 
the actual configuration the clock entrance has to be inverted with a small 
circle. The same for the JK flipflop so far as I can see.

P.S.
The correct English translations are:
"rising edge" and "falling edge" ;)