[Kernelloader-cvs] linux/simple-toolchain binutils-2.23.1-mipsel-ps2.patch, NONE, 1.1 binutils-2.23.1-mipsel-ps2-tests.patch, NONE, 1.1

[Mega M. <kl...@us...>]

Update of /cvsroot/kernelloader/linux/simple-toolchain
In directory vz-cvs-3.sog:/tmp/cvs-serv26297

Added Files:
	binutils-2.23.1-mipsel-ps2.patch 
	binutils-2.23.1-mipsel-ps2-tests.patch 
Log Message:
Updated to binutils-2.23.1.


--- NEW FILE: binutils-2.23.1-mipsel-ps2-tests.patch ---
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index cbaaa70..59f2ea3 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -71,6 +71,14 @@
 #		The architecture provides 32- or 64-bit General Purpose
 #		Registers.
 #
+#	n32native
+#		The architecture supports ABI n32, but not n64 or o64.
+#		The architecture provides support for ld and sd in ABI o32.
+#		The Linux kernel for R5900 is using ABI o32 with support for
+#		64 bit and 128 bit registers. ABI o64 can't be used, because
+#		64 bit addresses are not supported.
+#		The FPU is also limited to 32 bit.
+#
 # as_flags: The assembler flags used when assembling tests for this
 # architecture.
 #
[...1382 lines suppressed...]
+	maddu $31, $31, $0
+	maddu $0, $31
+	maddu $31, $0
+	sync
+
+	.set pop
+	.set push
+	.set reorder
+	# Short loop fix.
+	# NOPs should be inserted
+	li $3, 300
+short_loop1:
+	addi $3, -1
+	bne $3, $0, short_loop1
+
+	li $4, 3
+	.set pop
+
+	.space	8
+	.end stuff

--- NEW FILE: binutils-2.23.1-mipsel-ps2.patch ---
diff -Nurp binutils-2.23.1-orig/bfd/archures.c binutils-2.23.1-ps2/bfd/archures.c
--- binutils-2.23.1-orig/bfd/archures.c	2012-09-04 14:53:41.000000000 +0200
+++ binutils-2.23.1-ps2/bfd/archures.c	2012-11-22 21:39:47.760481485 +0100
@@ -161,6 +161,7 @@ DESCRIPTION
 .#define bfd_mach_mips5000		5000
 .#define bfd_mach_mips5400		5400
 .#define bfd_mach_mips5500		5500
+.#define bfd_mach_mips5900		5900
 .#define bfd_mach_mips6000		6000
 .#define bfd_mach_mips7000		7000
 .#define bfd_mach_mips8000		8000
diff -Nurp binutils-2.23.1-orig/bfd/bfd-in2.h binutils-2.23.1-ps2/bfd/bfd-in2.h
--- binutils-2.23.1-orig/bfd/bfd-in2.h	2012-09-04 14:53:41.000000000 +0200
+++ binutils-2.23.1-ps2/bfd/bfd-in2.h	2012-11-22 21:39:47.760481485 +0100
@@ -1890,6 +1890,7 @@ enum bfd_architecture
 #define bfd_mach_mips5000              5000
 #define bfd_mach_mips5400              5400
 #define bfd_mach_mips5500              5500
+#define bfd_mach_mips5900              5900
[...2466 lines suppressed...]
 {"psubb",	"D,S,T",	0x47c00001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2E	},
 {"psubb",	"D,S,T",	0x4bc00001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2F|IL3A	},
+{"psubb",	"d,v,t",	0x70000248,	0xfc0007ff,	WR_d|RD_s|RD_t,		0,	T5	},
 {"psubh",	"D,S,T",	0x47400001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2E	},
 {"psubh",	"D,S,T",	0x4b400001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2F|IL3A	},
+{"psubh",	"d,v,t",	0x70000148,	0xfc0007ff,	WR_d|RD_s|RD_t,		0,	T5	},
 {"psubw",	"D,S,T",	0x47600001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2E	},
 {"psubw",	"D,S,T",	0x4b600001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2F|IL3A	},
+{"psubw",	"d,v,t",	0x70000048,	0xfc0007ff,	WR_d|RD_s|RD_t,		0,	T5	},
 {"psubd",	"D,S,T",	0x47e00001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2E	},
 {"psubd",	"D,S,T",	0x4be00001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2F|IL3A	},
 {"psubsb",	"D,S,T",	0x47800001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2E	},
 {"psubsb",	"D,S,T",	0x4b800001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2F|IL3A	},
+{"psubsb",	"d,v,t",	0x70000648,	0xfc0007ff,	WR_d|RD_s|RD_t,		0,	T5	},
 {"psubsh",	"D,S,T",	0x47000001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2E	},
 {"psubsh",	"D,S,T",	0x4b000001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2F|IL3A	},
+{"psubsh",	"d,v,t",	0x70000548,	0xfc0007ff,	WR_d|RD_s|RD_t,		0,	T5	},
 {"psubusb",	"D,S,T",	0x47a00001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2E	},
 {"psubusb",	"D,S,T",	0x4ba00001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2F|IL3A	},
 {"psubush",	"D,S,T",	0x47200001,	0xffe0003f,	RD_S|RD_T|WR_D|FP_D,	0,	IL2E	},