VMOVAPS Requires YMMWORD PTR
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japheth
vmovaps ymmword ptr [rdi],ymm0 ; This assembles correctly in 64bit mode.
vmovaps [rdi],ymm0 ; This does not (Invalid instruction operands).
The ymmword ptr shouldn't be required as the operation size is given by the register (ymm(n)). As per XMM
movaps [rdi],xmm0 ; This works fine.
I've identified 8 instructions so far where the "ymm"-variant has a problem if the memory operand has "no type":
vmaskmovps [ebx], ymm0, ymm1
vmaskmovpd [ebx], ymm0, ymm1
vperm2f128 ymm0, ymm1, [ebx], 1
vmovapd [ebx], ymm1
vmovaps [ebx], ymm1
vmovupd [ebx], ymm1
vmovups [ebx], ymm1
vmovddup ymm0, [ebx]
I won't fix this for v2.08; because the AVX part is not really covered by regression tests, that means, the risk that something gets damaged by changes is relatively high.
However, you can change the code yourself. The four vmovxpx variants may work without type coercion if you add a few lines in codegen.c:
#if AVXSUPP
if ( CodeInfo->token >= VEX_START && ( vex_flags[ CodeInfo->token - VEX_START ] & VX_L ) ) {
if ( CodeInfo->opnd[OPND1].type & ( OP_YMM | OP_M256) ) {
if ( opnd2 & OP_YMM )
opnd2 |= OP_XMM;
else if ( opnd2 & OP_M256 )
opnd2 |= OP_M128;
else if ( opnd2 & OP_M128 )
opnd2 |= OP_M64;
else if ( ( opnd2 & OP_XMM ) && !( vex_flags[ CodeInfo->token - VEX_START ] & VX_HALF ) ) {
EmitError( INSTRUCTION_OR_REGISTER_NOT_ACCEPTED_IN_CURRENT_CPU_MODE );
return( ERROR );
}
}
#if 1 // add this block!
else if ( CodeInfo->opnd[OPND1].type == OP_M ) {
if ( opnd2 & OP_YMM )
opnd2 |= OP_XMM;
}
#endif
}
#endif
There are a few AVX instructions where the opposite is true: they should require a memory type, but currently they're also accepting an "untyped" memory operand.
I guess that I'll change my mind and fix the avx-issues for 2.08.