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From: Florent O. <ou...@us...> - 2004-12-18 23:53:05
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Update of /cvsroot/jvcl/dev/donations/SIMDView In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv30991/donations/SIMDView Modified Files: JvSIMDTest.dpr JvSIMDUtils.pas JvSIMDView.pas JvSIMDViewForm.dfm Log Message: create simd64 and simd128 strings. Index: JvSIMDUtils.pas =================================================================== RCS file: /cvsroot/jvcl/dev/donations/SIMDView/JvSIMDUtils.pas,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** JvSIMDUtils.pas 18 Dec 2004 20:09:45 -0000 1.1 --- JvSIMDUtils.pas 18 Dec 2004 23:52:56 -0000 1.2 *************** *** 156,160 **** RsExMMX = 'Extensions to MMX'; RsEx3DNow = 'Extensions to 3DNow!'; ! RsLong = '64-Bit'; RsTrademarks = 'MMX is a trademark of Intel Corporation.'+sLineBreak+ --- 156,160 ---- RsExMMX = 'Extensions to MMX'; RsEx3DNow = 'Extensions to 3DNow!'; ! RsLong = '64-Bit-Core'; RsTrademarks = 'MMX is a trademark of Intel Corporation.'+sLineBreak+ *************** *** 163,167 **** // to the registered name ! RsNo128BitSIMD = 'No 128-bit-wide-registers SIMD'; RsVectorIE = 'IE '; --- 163,169 ---- // to the registered name ! RsNoSIMD = 'No SIMD registers found'; ! RsNo128SIMD = 'No 128-bit-wide-register SIMD'; ! RsNo64SIMD = 'No 64-bit-wide-register SIMD'; RsVectorIE = 'IE '; *************** *** 316,319 **** --- 318,323 ---- Vendor: string; SIMDString: string; + SIMD64String: string; + SIMD128String: string; case VendorID: TVendorID of viIntel : (IntelSIMD: TIntelSIMD); *************** *** 456,467 **** end; ! function GetIntelSIMDString: string; function AppendStr(Left, Right: string): string; begin if Left = '' then ! Result := '' else ! Result := Left+','; ! Result := Result + Right; end; begin --- 460,470 ---- end; ! procedure GetIntelSIMDStrings; function AppendStr(Left, Right: string): string; begin if Left = '' then ! Result := Right else ! Result := Left+','+Right; end; begin *************** *** 470,484 **** with ProcessorInfo do begin ! Result := ''; if (VendorID <> viIntel) then Exit; if (isMMX in IntelSIMD) then ! Result := AppendStr(Result,RsMMX); if (isSSE1 in IntelSIMD) then ! Result := AppendStr(Result,RsSSE1); if (isSSE2 in IntelSIMD) then ! Result := AppendStr(Result,RsSSE2); if (isSSE3 in IntelSIMD) then ! Result := AppendStr(Result,RsSSE3); end; end; --- 473,501 ---- with ProcessorInfo do begin ! SIMDString := ''; ! SIMD64String := ''; ! SIMD128String := ''; if (VendorID <> viIntel) then Exit; if (isMMX in IntelSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsMMX); ! SIMD64String := AppendStr(SIMD64String,RsMMX); ! end; if (isSSE1 in IntelSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsSSE1); ! SIMD128String := AppendStr(SIMD128String,RsSSE1); ! end; if (isSSE2 in IntelSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsSSE2); ! SIMD128String := AppendStr(SIMD128String,RsSSE2); ! end; if (isSSE3 in IntelSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsSSE3); ! SIMD128String := AppendStr(SIMD128String,RsSSE3); ! end; end; end; *************** *** 523,556 **** end; ! function Is128BitSIMDPresent: Boolean; ! // SSE and 3dNow! are 128-bit-wide operands ! begin ! case ProcessorVendorID of ! viIntel : Result := (IntelSIMD * [isSSE1, isSSE2, isSSE3])<>[]; ! viAMD : Result := (AMDSIMD * [as3DNow, asEx3DNow, asSSE1, asSSE2])<>[]; ! //viOther, ! else Result := False; ! end; ! end; ! ! function Is64BitSIMDPresent: Boolean; ! // MMX are 64-bit-wide operands ! begin ! case ProcessorVendorID of ! viIntel : Result := isMMX in IntelSIMD; ! viAMD : Result := (AMDSIMD * [asMMX, asExMMX])<>[]; ! //viOther, ! else Result := False; ! end; ! end; ! ! function GetAMDSIMDString: string; function AppendStr(Left, Right: string): string; begin if Left = '' then ! Result := '' else ! Result := Left+','; ! Result := Result + Right; end; begin --- 540,550 ---- end; ! procedure GetAMDSIMDStrings; function AppendStr(Left, Right: string): string; begin if Left = '' then ! Result := Right else ! Result := Left+','+Right; end; begin *************** *** 559,579 **** with ProcessorInfo do begin ! Result := ''; if (VendorID <> viAMD) then Exit; if (asMMX in AMDSIMD) then ! Result := AppendStr(Result,RsMMX); if (as3DNow in AMDSIMD) then ! Result := AppendStr(Result,Rs3DNow); if (asExMMX in AMDSIMD) then ! Result := AppendStr(Result,RsExMMX); if (asEx3DNow in AMDSIMD) then ! Result := AppendStr(Result,RsEx3DNow); if (asSSE1 in AMDSIMD) then ! Result := AppendStr(Result,RsSSE1); if (asSSE2 in AMDSIMD) then ! Result := AppendStr(Result,RsSSE2); if (asLong in AMDSIMD) then ! Result := AppendStr(Result,RsLong); end; end; --- 553,596 ---- with ProcessorInfo do begin ! SIMDString := ''; ! SIMD64String := ''; ! SIMD128String := ''; if (VendorID <> viAMD) then Exit; if (asMMX in AMDSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsMMX); ! SIMD64String := AppendStr(SIMD64String,RsMMX); ! end; if (as3DNow in AMDSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,Rs3DNow); ! SIMD64String := AppendStr(SIMD64String,Rs3DNow); ! end; if (asExMMX in AMDSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsExMMX); ! SIMD64String := AppendStr(SIMD64String,RsExMMX); ! end; if (asEx3DNow in AMDSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsEx3DNow); ! SIMD64String := AppendStr(SIMD64String,RsEx3DNow); ! end; if (asSSE1 in AMDSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsSSE1); ! SIMD128String := AppendStr(SIMD128String,RsSSE1); ! end; if (asSSE2 in AMDSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsSSE2); ! SIMD128String := AppendStr(SIMD128String,RsSSE2); ! end; if (asLong in AMDSIMD) then ! begin ! SIMDString := AppendStr(SIMDString,RsLong); ! SIMD128String := AppendStr(SIMD128String,RsLong); ! end; end; end; *************** *** 601,618 **** begin IntelSIMD := GetIntelSIMD; ! SIMDString := GetIntelSIMDString; end; viAMD : begin AMDSIMD := GetAMDSIMD; ! SIMDString := GetAMDSIMDString; end; end; ! if (SIMDString = '') then ! SIMDString := RsNo128BitSIMD; end; end; end; function GetVectorContext(hThread: THandle; out VectorContext:TJvVectorFrame): Boolean; var --- 618,661 ---- begin IntelSIMD := GetIntelSIMD; ! GetIntelSIMDStrings; end; viAMD : begin AMDSIMD := GetAMDSIMD; ! GetAMDSIMDStrings; end; end; ! if SIMDString = '' then ! SIMDString := RsNoSIMD; ! if SIMD128String = '' then ! SIMD128String := RsNo128SIMD; ! if SIMD64String = '' then ! SIMD64String := RsNo64SIMD; end; end; end; + function Is128BitSIMDPresent: Boolean; + // SSE and 3dNow! are 128-bit-wide operands + begin + case ProcessorVendorID of + viIntel : Result := (IntelSIMD * [isSSE1, isSSE2, isSSE3])<>[]; + viAMD : Result := (AMDSIMD * [as3DNow, asEx3DNow, asSSE1, asSSE2])<>[]; + //viOther, + else Result := False; + end; + end; + + function Is64BitSIMDPresent: Boolean; + // MMX are 64-bit-wide operands + begin + case ProcessorVendorID of + viIntel : Result := isMMX in IntelSIMD; + viAMD : Result := (AMDSIMD * [asMMX, asExMMX])<>[]; + //viOther, + else Result := False; + end; + end; + function GetVectorContext(hThread: THandle; out VectorContext:TJvVectorFrame): Boolean; var Index: JvSIMDView.pas =================================================================== RCS file: /cvsroot/jvcl/dev/donations/SIMDView/JvSIMDView.pas,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** JvSIMDView.pas 18 Dec 2004 20:09:45 -0000 1.1 --- JvSIMDView.pas 18 Dec 2004 23:52:56 -0000 1.2 *************** *** 131,135 **** if not (Is128BitSIMDPresent) then begin ! MessageDlg(RsNo128BitSIMD,mtError,[mbAbort],0); Exit; end; --- 131,135 ---- if not (Is128BitSIMDPresent) then begin ! MessageDlg(RsNo128SIMD,mtError,[mbAbort],0); Exit; end; *************** *** 328,332 **** begin inherited Create; - FOwner:=AOwner; FProcessList:=TList.Create; --- 328,331 ---- Index: JvSIMDViewForm.dfm =================================================================== RCS file: /cvsroot/jvcl/dev/donations/SIMDView/JvSIMDViewForm.dfm,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** JvSIMDViewForm.dfm 18 Dec 2004 20:09:45 -0000 1.1 --- JvSIMDViewForm.dfm 18 Dec 2004 23:52:56 -0000 1.2 *************** *** 133,137 **** object PopupMenuMXCSR: TPopupMenu AutoPopup = False ! Left = 136 Top = 48 object MenuItemComplement: TMenuItem --- 133,137 ---- object PopupMenuMXCSR: TPopupMenu AutoPopup = False ! Left = 800 Top = 48 object MenuItemComplement: TMenuItem Index: JvSIMDTest.dpr =================================================================== RCS file: /cvsroot/jvcl/dev/donations/SIMDView/JvSIMDTest.dpr,v retrieving revision 1.1 retrieving revision 1.2 diff -C2 -d -r1.1 -r1.2 *** JvSIMDTest.dpr 18 Dec 2004 20:09:45 -0000 1.1 --- JvSIMDTest.dpr 18 Dec 2004 23:52:50 -0000 1.2 *************** *** 68,72 **** movups Values, xmm0 // moving xmm0 to Values end; ! WriteLn('Computation ended'); WriteLn; WriteLn('Now values are :'); --- 68,72 ---- movups Values, xmm0 // moving xmm0 to Values end; ! WriteLn('Computations ended'); WriteLn; WriteLn('Now values are :'); |