From: Evan L. <sa2...@cy...> - 2021-01-28 17:12:20
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In an environment where you have one testbench file and multiple RTL files, it is common to have a single timescale in the TB file, and no timescale directives in the RTL code. However, if you compile this as 'iverilog -Wtimescale tb.v rtl1.v .. rtln.v', you get a timescale warning ('warning:timescale for rtl1.v inherited from another file'). This inheritance is exactly what you want in this case, and is valid (of course, if the timescale is not in the first file compiled, there's an issue). I can see that the warning would make sense if Icarus compiled each file independently and linked the results, but it doesn't. Thoughts? |