Re: [Iverilog-devel] Small stuff

[Martin W. <ic...@ma...>]

On 08/10/2020 12:27, Evan Lavelle wrote:
> Here's another one:
> 
> `define \A foo
> 
> module `\A;
>    initial
>      $display("%m: Ok");
> endmodule
> this code doesn't work on any of the simulators on EDA Playground
> (https://www.edaplayground.com/x/6yZJ). However, the LRM seems pretty
> clear that it should:
> 
> text_macro_definition ::= `define text_macro_name macro_text
> text_macro_name ::= text_macro_identifier [( list_of_formal_arguments )]
> text_macro_identifier ::= identifier
> identifier ::= simple_identifier | escaped_identifier
> 
> In other words, a text macro name can be an escaped identifier, but
> no-one seems to support this. Xcelium, at least, just creates a macro
> named 'A'.

I don't think we could fix that without breaking recognition of the SV 
`\`" escape sequence.