From: Martin W. <ic...@ma...> - 2019-09-27 22:22:04
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Recursive functions have been supported for a long time. See https://github.com/steveicarus/ivtest/blob/master/ivltests/recursive_func.v Trying to compile the sha_mainloop.sv file from that GitHub project shows it is the always_comb construct that is causing the problem. Change it to an always @*, and the module compiles without error. fuyong wrote: > Hi, > > We have download a design from Github. This design can run correctly in > VCS. But iVeriog compile hang. > > https://github.com/unixb0y/SystemVerilogSHA256 > > Guess it is the following function (recursive function as it call itself) > cause the issue: > > function automatic [31:0] W; > input [6:0] x; > input [6:0] y; > if(^x === 1'bX) W = 32'h777; > else W = (x<16) ? padded[((PADDED_SIZE-1-y*512)-x*32) -: 32] : > rho1(W(x-2, y)) + W(x-7, y) + rho0(W(x-15, y)) + W(x-16, y); > endfunction > > Any suggestions on how to change the code for workaround? Or enhancement in > iVerilog :-) ? > > Thanks, > Yong > > > > > > _______________________________________________ > Iverilog-devel mailing list > Ive...@li... > https://lists.sourceforge.net/lists/listinfo/iverilog-devel > |