Re: [Iverilog-devel] SystemVerilog Support

[Martin W. <ic...@ma...>]

Hagen SANKOWSKI wrote:
> Hello.
> 
> I am wondering how far Icarus Verilog is from supporting SystemVerilog..
> 
> During the last years I worked for different clients and faced the emerging 
> power of SystemVerilog Designs.
> More than one-and-a-half decade Icarus Verilog was great to support me 
> during all the design tasks in Verilog. Now I like to go one step further 
> and deliver Open Source SystemVerilog Cores also.
> 
> So:
> What's about the support for SystemVerilog?
> Are there some planes to support SystemVerilog?

There is already support for some SystemVerilog features. Unfortunately 
there's no definitive list of what is or isn't supported, but you can look 
in the test suite to get an idea:

   https://github.com/steveicarus/ivtest/blob/master/regress-sv.list

Cary intends to complete the support for always_comb et al., but I'm not 
aware of any plans to add support for more features.