[Iverilog-devel] are segfaults due to bad code of interest?

[Galen S. <ga...@se...>]

Hi,

Is there an interest in segfaults due to bad code? 

[galens@toto lm8]$ iverilog -Wall '-g2012' foo.sv
foo.sv:7: warning: @* found no sensitivities so it will never trigger.
sh: line 1: 12448 Done                    /usr/local/lib/ivl/ivlpp -L -Wredef-chg -F"/tmp/ivrlg23071f291" -f"/tmp/ivrlg3071f291" -p"/tmp/ivrli3071f291"
     12449 Segmentation fault      (core dumped) | /usr/local/lib/ivl/ivl -C"/tmp/ivrlh3071f291" -C"/usr/local/lib/ivl/vvp.conf" -- -

[galens@toto lm8]$ iverilog -V
Icarus Verilog version 11.0 (devel) (v10_2-78-gb7b22660)

[galens@toto lm8]$ cat foo.sv
module foo
  (
   input 	       a,
   output logic        y
   );

   always_comb begin
`ifdef NO_SEGFAULT
      y = a;
`else
      y = 1'b0;
`endif
   end
endmodule


thanks,
galen
-- 
Galen Seitz
ga...@se...