Re: [Iverilog-devel] Status of the verilog output target?

[Stephen W. <st...@ic...>]

Generate elaborate DOES happen in the target-independent elaboration
phase, so the only thing about generate that the target sees is the
fully elaborate generate scope. For example, a generate-loop may
create N scopes. But the target does not have to understand anything
about generate, only that there is a named scope there.

On Sun, Mar 19, 2017 at 11:17 PM, Niels Möller <ni...@ly...> wrote:

> "Cary R." <cy...@ya...> writes:
>
> > The vlog95 target is currently the only mostly functional Verilog
> > target and as the author of it I had intended to support the generate
> > constructs. The problem is life, a new job etc. got in the way and I
> > never have gotten around to finishing it.
>
> Thanks for the info, and for your work on iverilog. I fully understand
> that priorities change.
>
> About generate, I was a bit surprised, I would (naively?) have expected
> generate to be implemented in some target-independent elaboration phase.
> But I guess there may be some target-specific processing too, like
> producing valid and unique names for variables defined inside a generate
> block.
>
> Best regards,
> /Niels
>
> --
> Niels Möller. PGP-encrypted email is preferred. Keyid 368C6677.
> Internet email is subject to wholesale government surveillance.
>
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