[Iverilog-devel] SDF back annotation support

[Patrick <pat...@gm...>]

Hi developers,

First of all thank you for your great efforts in developing icarus verilog!

I would like to use icarus verilog to run a back annotated simulation
(using an SDF file).

At first I had some problems getting the simulation to run and I got the
following errors:
SDF ERROR: Too many errors: syntax error
1:SDF ERROR: Invalid DELAYFILE format
This was caused by the file-format of the SDF file. Running the dos2unix
command on the SDF file solved this problem.

The simulation is now running, but I am getting a lot of warnings (~42k).
Most notably of the form:
- SDF WARNING: INTERCONNECT not supported.
- SDF WARNING: COND not supported.

My questions are:
1) Are there any plans for supporting these SDF constructs in the future?
2) Would it be possible to use a work-around (for instance by replacing
INTERCONNECT with something else that is supported)?

Thanks and best regards,
Patrick