Re: [Iverilog-devel] Structure as a module port in Icarus

[Kevin C. <iv...@gr...>]

[Just FYI]

The "net-type" extension in SV is very similar to what VHDL has always done (since the 80s), and falls somewhat short of what you want. Verilog-AMS does a lot better with voltages and currents, but for some reason that's viewed as analog-only by the EDA vendors/developers.

It's somewhat unlikely the situation will improve if left to the SV committees to fix (there's a general dislike of things that look analog there), so there is an opportunity to fix how it works in the open source simulators, e.g.:

  * A wire should be neutral interconnect
  * Drivers and receivers have types (not the wires)
  * Wires should support potential and flow in digital (not potential or flow)

Noting that a packed struct type on a port is an array of wires, rather than a single wire with a composite value.

My current plan for the next SV LRM is (unlikely to happen):

  * Make "logic" a user defined type - i.e. move it to headers in user space (as done in VHDL)
  * Implement "logic" as a template type with orthogonal value, strength and certainty components
  * Implement the built-in primitives in user space (transistor models) based on the logic template type

That lets you create an alternative logic type that is voltage based, but you don't have to rewrite module code to get it to work (polymorphism). Resolving drivers & receivers across different types is a fairly simple process, but isn't implemented in either SV or VHDL -

  * Convert all drivers to a common resolvable type (with lossless conversions)
  * Resolve converted drivers
  * Convert result to receivers (can be lossy conversions, e.g. voltage to logic 1/0)

If you can get that working you can add RF modeling by making the value component of a net-type a spectrum with a location and polarisation etc. and add being able to do the resolution on a per receiver basis (drivers & receivers being antennas).

Kev.


On 03/25/2016 01:22 PM, Martin Whitaker wrote:
> Krishnaraj Bhat wrote:
>> Hi All,
>>
>> Could any one please let me know whether Icarus supports passing Structure
>> types as module ports? We have to pass voltage/current values across the
>> module ports. For this we are thinking of using a structure with voltage
>> and current values as members of structure with real data type. And using
>> this struct as module port. Could any one please let me know whether this
>> is supported in Icarus?
> Icarus doesn't support unpacked structs. Packed struct types can be used for module ports, but 
> packed structs can't contain real values.
>
> Martin
>
>
> ------------------------------------------------------------------------------
> Transform Data into Opportunity.
> Accelerate data analysis in your applications with
> Intel Data Analytics Acceleration Library.
> Click to learn more.
> http://pubads.g.doubleclick.net/gampad/clk?id=278785351&iu=/4140
> _______________________________________________
> Iverilog-devel mailing list
> Ive...@li...
> https://lists.sourceforge.net/lists/listinfo/iverilog-devel
>