Re: [Iverilog-devel] vhdlpp update

[Maciej S. <mac...@ce...>]

On 04/23/2015 05:35 PM, Stephen Williams wrote:
> If the word is not a reserved word as listed in the IEEE1076
> standard, then it cannot be parsed as a keyword. It needs to
> be matched as an IDENTIFIER and interpreted during semantic
> analysis. This is one of the painful quirks of VHDL.
> 
> So no, you cannot add new keywords. Match them as IDENTIFIERs,
> then check the actual value in the rules where you expect them.

Ok, it is already fixed. I have also added a patch from Larry Doolittle
to handle or_reduce() and and_reduce() function.

I enclose one more patch that needs a review. I am wondering if it is
required for both arguments in NetEBDiv to have the same width? There is
a testcase attached which causes an assertion failure, but in fact it
works fine. It also does not break any other tests, but I might have
missed something important there.

Regards,
Orson