Re: [Iverilog-devel] vhdlpp update

[Stephen W. <st...@ic...>]

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On 04/23/2015 07:16 AM, Maciej Sumiński wrote:
> I have one doubt regarding the proposed branch. It introduces a few
> new keywords (true, false, note, warning, error, failure). Because
> of that, it is impossible to use them as names, so for example you
> cannot have a signal called 'true', which should be technically
> valid according to the VHDL standard.

If the word is not a reserved word as listed in the IEEE1076
standard, then it cannot be parsed as a keyword. It needs to
be matched as an IDENTIFIER and interpreted during semantic
analysis. This is one of the painful quirks of VHDL.

So no, you cannot add new keywords. Match them as IDENTIFIERs,
then check the actual value in the rules where you expect them.

- -- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."
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