Re: [Iverilog-devel] Assertion failure for system verilog structs

[<ni...@ly...>]

Martin Whitaker <mai...@ma...> writes:

> Yes, the problem was that the compilation of the parent net was delayed 
> (pending resolution of another symbol lookup), which meant that when the PV 
> expression was compiled, the VPI handle for the parent wasn't available.
>
> I've pushed a fix for this to the master branch on GitHub.

I've updated to the new version, and it no longer crashes on my test
case.

Thanks!
/Niels

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