Re: [Iverilog-devel] vec4-stack merge

[Cary R. <cy...@ya...>]

I updated the expected results for two of the vlog95 tests since they now more closely match the normal output. The other test needed to be run with signed support since it was generating a signed undefined value and when displayed that value requires one more space than an unsigned undefined value (for the sign +/-). The current default translation is to generate unsigned undefined values, but these print with a field width that is one less than a signed undefined value when they are used directly in a print statement. They should work fine in an expression.

I'm slightly concerned how we are going to get complex expression to work with the stack based calls. I think we may need to extend the stacks we have to also allow them to support expressions that return the given type (e.g. push 4'b1000 or push an expression that returns a 4 bit value to the vec4 stack). The expression would need to be evaluated when it was popped to generate the value that is actually returned by the pop.
I need to look at the stack stuff in more detail before I make any other comments, but it seems like there could also be issues with deferred tasks that do not have a specific order of evaluation (e.g. multiple $strobe and/or $monitor calls in the same module (stack scope).

Cary
 

     On Sunday, December 7, 2014 7:18 PM, Stephen Williams <st...@ic...> wrote:
   

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On 12/07/2014 02:57 PM, Stephan Böttcher wrote:
> * Both vvp executables identify with the same version string?

You need to "make version" to regenerate the version string.

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