[Iverilog-devel] Another set of SystemVerilog sanity checks

[Stephen W. <st...@ic...>]

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Hi folks,

I'm working on some more complex issues of foreach loops and
queue assignments, and I would once again like to get a sanity
check of the attached programs to make sure I properly understand
the tested behaviors.

Can someone with access to Big-N SV tools try the attached examples?

Thanks!

- -- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."
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