Re: [Iverilog-devel] Some delay code to test

[Stephen W. <st...@ic...>]

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Note that "constant values are propagated" is a Verilog constant meaning
that constant values are propagated through the network, whereas the
term "constant propagation" is a generic compiler construction term
meaning the propagation of constant values through expressions. The
LRM says exactly nothing about "constant propagation" in the latter
sense.

Also, it is 100% clear to me that in your example, ca and gt should be
'bx for 10 clicks before the constant value arrives. What if, for
example, the expression on the right side were a variable that just
happens to have a constant value?

On 08/18/2014 03:02 PM, Martin Whitaker wrote:
> Section 11.6.1 of 1364-2005 states
> 
> "A continuous assignment process is also evaluated at time 0 to
> ensure that constant values are propagated."
> 
> If we follow the normal rules for a continuous assignment with a
> delay, the LHS should only be updated after the specified delay.
> 
> I know Verilog-XL and NC-Verilog behave this way.
> 
> Martin
> 
> Cary R. wrote:
>> I am looking to see what the attached code does for various
>> simulators. glpcver and CVC both do constant propagation
>> independent of the delay while Icarus stops at the delay for both
>> constant and variable assignments. It makes sense that the gate
>> and continuous assignment should match since they are intended to
>> model the same functionality at different levels of abstraction.
>> I looked in the standard and could not find where it specified 
>> that a constant should be propagated like this. Any pointers to
>> where in the standard this is specified and/or test results would
>> be appreciated.
>> 
>> I am running CVC against the Icarus test suite looking for errors
>> in either simulator and this is the first big difference I am
>> looking at.
>> 
>> Cary
> 
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>
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