Re: [Iverilog-devel] What is a constant?

[Martin W. <mai...@ma...>]

Hi Guy,

Guy Hutchison wrote:
> Variable bit indexes are not synthesizable, although I have not tried
> indexes using a generate.  If they are supported by synth that would be the
> most straightforward approach.  At present I don't have access to a
> synthesis tool; I'll have to try this next time one is available.
>
I got curious, and tried this out in DC. It accepts

assign p_data = c_data[select*width +: width];

and maps it to generic SELECT_OP cells (so will either map to a mux or and/or 
implementation, as DC sees fit). I'm using the latest release of DC, so it may 
be this feature has only been added recently.

I've been using indexes based on a genvar for some years, so know that 
Synopsys, Cadence, Altera, and Xilinx synthesis tools all support this.

> It's true that it is actually a priority encoder; since bit selects were
> already available this was easier than an encoded mux.
>
Using the alternative coding I suggested gives a smaller/faster implementation 
in my experience.

Martin