From: Guy H. <ghu...@gm...> - 2012-03-24 03:53:39
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Hi Martin, Variable bit indexes are not synthesizable, although I have not tried indexes using a generate. If they are supported by synth that would be the most straightforward approach. At present I don't have access to a synthesis tool; I'll have to try this next time one is available. It's true that it is actually a priority encoder; since bit selects were already available this was easier than an encoded mux. Guy On Mar 23, 2012, at 5:20 PM, Martin Whitaker <mai...@ma...> wrote: > Guy Hutchison wrote: >> Good catch by all replies, changing this to: >> generate >> for (g=0; g<inputs; g=g+1) >> begin : breakout >> wire [width-1:0] insel; >> if (g==0) >> assign insel = (rr_state[0]) ? c_data[width-1:0] : {width{1'b0}}; >> else >> assign insel = (rr_state[g]) ? c_data>> (g*width) : >> breakout[g-1].insel; >> end >> endgenerate >> assign p_data = breakout[inputs-1].insel; >> >> Fixes the access-zero problem, as zero is the special case. >> >> As to why I am using this goofy structure, it is because building a >> parameterized mux is a little painful if you have to have constant bit >> selects, so I'm forced in to more odd constructions. > > You've actually coded a priority encoder. If you really want a mux, it's a > fairly simple change: > > generate > for (g=0; g<inputs; g=g+1) > begin : breakout > wire [width-1:0] insel; > wire [width-1:0] out; > assign insel = {width{rr_state[g]}} & c_data[width*g +: width]; > if (g==0) > assign out = insel; > else > assign out = insel | breakout[g-1].out; > end > endgenerate > assign p_data = breakout[inputs-1].out; > > This should synthesise without any trouble. > > If you don't need a one-hot coded select, you can always write: > > assign p_data = c_data[rr_index*width +: width]; > > although I've never tried synthesising a construct like this. > > Martin > > ------------------------------------------------------------------------------ > This SF email is sponsosred by: > Try Windows Azure free for 90 days Click Here > http://p.sf.net/sfu/sfd2d-msazure > _______________________________________________ > Iverilog-devel mailing list > Ive...@li... > https://lists.sourceforge.net/lists/listinfo/iverilog-devel |