Re: [Iverilog-devel] The tranif1 test is not right?

[Cary R. <cy...@ya...>]

--- On Tue, 10/13/09, Stephen Williams <st...@ic...> wrote:
 
> But I don't believe this should simulate properly. The
> tranifs
> are not drivers themselves, so if the external pin driver
> is
> released, "pin" will go to Z, which will close *both* gates
> and
> pin will stay HiZ.
> 
> Can people who have access try the attached program on the
> Big 3?

Since this is so poorly documented in the standard and every
other place we look, I think comparing is the only way to
know if we are on the right track. It may be a good idea to
test the other tran/tranif related tests to make sure they
match. The obvious functionality is not always what the big
3 have implemented.

Cary