[Iverilog-devel] Icarus Verilog with Xilinx ISE 10.1

[J. P. B. <jpb...@gm...>]

Hello,
   Please forgive me if I should post this question in a -users list.
   I'm using Xilinx's 10.1 ISE for FPGA design, and I would like to
use Icarus Verilog for simulating my designs.  Is there any way to use
iverilog for simulation with the ISE?  In particular, how can I
utilize Xilinx IP in my iverilog simulations?
   Thanks for your help!

   Patrick