[Iverilog-devel] timescale warning too dumb?

[Larry D. <ldo...@re...>]

Hi -

For years, I have learned to avoid the
  warning: timescale for foo inherited from another file.
message by simply putting
  `timescale 1ns / 1ns
at the beginning of every file.

Is this really needed for pure synthesizable code, when
there are no times listed anywhere in the file?

I ask because the soon-to-be-released vhd2vl will emit
timescale directives if needed, taking its cue from the units
used in the original VHDL (and complaining if multiple units
are used in a file).  It seems silly and surprising to emit
a `timescale directive (with a capricious choice of unit)
if no delays are used in the original VHDL.

Would it make sense to only trigger the iverilog warning if
a delay specification is encountered?

   - Larry