Re: [Iverilog-devel] Include file search path.

[Jeremy B. <je...@je...>]

On Fri, 2009-01-30 at 12:03 -0800, Cary R. wrote:
> We have a report in the tracker (pr2533613) requesting a change
> to the include search path. I believe we are currently doing
> this correctly. What we do almost exactly matches what gcc does.
> The request is to make the directory the compiler is running in
> be the first directory searched not the directory the file is
> located in. The consequence of this is that it is easy and
> probably too easy to override any include file.
> 
> We do add the compile directory as the second search path
> entry. This is the sole difference from gcc and is basically an
> implicit -I. at the head of the search path. I believe the
> users problem can be worked around with better use of the -I
> flag, so the real question is should we keep the implicit -I.
> or should we make this match gcc exactly?

<details of GCC cut>

Hi Cary,

Apologies if this is a duplicate. I've added this to the bug report and
am mirroring it to the discussion list.

You are correct about GCC.

But..

Icarus Verilog is NOT an alternative to GCC. It is an event-drive HDL
simulator and alternative to NC, VCS, ModelSim, VTOC, SpeedCompiler,
Verilator etc. So you should look to all the Verilog tools.

Where behavior is not clear in IEEE 1364 (the detailed interpretation of
`include is not covered), all the manufacturers mimic Verilog-XL
(because it was the first HDL simulator). It states:

"The `include compiler directive works in the following way:
 1. Verilog-XL searches for the file specified by the compiler
directive, relative to the current working directory.
 2. If the file is not found, Verilog-XL searches the directories
specified in the +incdir+ command-line plus option. Verilog-XL searches
these directories in the order in which you list them on the command
line.
 3. If Verilog-XL finds the file specified by the `include compiler
directive, it executes the source code in that file as though that code
has replaced the ‘include compiler directive.
 4. If Verilog-XL searches all the directories that you specified in the
+incdir+ command-line plus argument and the file is not found, then the
search results in an error and compilation stops."

It is essential Icarus Verilog follow the behavior of event driven
simulators, or users of NC/VCS/ModelSim will not be able to migrate to
this open source alternative.

Historically, the difference is probably due to the concept of "golden
RTL". Once a design is verified, it becomes "golden" and may not be
changed without stringent procedures and checks (with mask sets $1M+,
introducing a new bug is something you want to avoid). Engineers
starting work on a derivative create a mirror RTL source tree with just
the new files. They use the +incdir+ and -y arguments to ensure that the
mirror tree is searched first, thereby picking up the modified design.
This way all changed RTL is kept isolated in a separate source tree.

HTH,


Jeremy

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