Re: [Iverilog-devel] VVP Performance boots

[Cary R. <cy...@ya...>]

--- On Mon, 4/21/08, Stephen Williams <st...@ic...> wrote:
 
> I've pushed into GIT changes to the vvp_vector4_t class
> that
> rework how the bits of bit4 values are stored in the
> vector. This
> change is based on ideas from Cary. The result is a
> *significant*
> boost in performance for simulations heavy with arithmetic.
> The
> multiple_large test is something like 20% faster. So we may
> want
> to be on the lookout for similar opportunities. We are
> still in
> the need of performance improvement on run time.

I just run the test suite on my RHEL 4 32 bit machine and this patch causes an infinite loop in vvp for xnor_test and gives incorrect results for writememh2, writememb1, writemem2 and scanmem3 (from the VPI tests).

It appears that the writemem* work files are being created correctly. The scanmem3 file looks to be z vs x differences.

Once the problems are fixed I will also run valgrind to look for any other problem.

Once this is stable I think there are some more optimization that can be done for the various logic gates/functions. I can forward you the Verilog file I used to develop the gate optimization if you would like.

Cary


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