Re: [Iverilog-devel] How to get more information when internal errors happen

[Larry D. <ldo...@re...>]

On Fri, Jan 25, 2008 at 10:42:57AM -0800, Larry Doolittle wrote:
> The concat output of vvp code generator
> is the first place the error appears.

I'm getting rather confused.  I just tried to reproduce the error
on amd64, and could not.  Both iverilog's supposedly were built from
the same source tree.

On Fri, Jan 25, 2008 at 10:13:59AM -0800, Larry Doolittle wrote:
> add debug:elaborate 
> to the resulting foo.conf, and (assuming you don't have any
> actual preprocessor activity) rerun the ivl command

See if you like the appended patch.  It's pretty simple, and lets
you say "iverilog -d elaborate" to get the desired effect.
I'm not sure 'd' is the best letter to use, and documentation
needs to be added.

   - Larry


--- /home/ldoolitt/git/verilog/driver/main.c	2008-01-02 11:23:05.000000000 -0800
+++ driver/main.c	2008-01-25 10:46:21.000000000 -0800
@@ -593,7 +593,7 @@
 	}
       }
 
-      while ((opt = getopt(argc, argv, "B:c:D:Ef:g:hI:M:m:N::o:p:Ss:T:t:vVW:y:Y:")) != EOF) {
+      while ((opt = getopt(argc, argv, "B:c:D:d:Ef:g:hI:M:m:N::o:p:Ss:T:t:vVW:y:Y:")) != EOF) {
 
 	    switch (opt) {
 		case 'B':
@@ -620,6 +620,9 @@
 		case 'p':
 		  fprintf(iconfig_file, "flag:%s\n", optarg);
 		  break;
+		case 'd':
+		  fprintf(iconfig_file, "debug:%s\n", optarg);
+		  break;
 
 		case 'g':
 		  rc = process_generation(optarg);