Re: [Iverilog-devel] Partial fix for pr1867161

[Cary R. <cy...@ya...>]

--- Stephen Williams <st...@ic...> wrote:
>
> Does this take into account all the different uses of the
> draw_signal_dest function? It is not just called from the
> draw_load_add_immediate, as you saw. I suspect your logic is
> correct. The patch looks reasonable on that score at least.

Yes it does. There are only three calls to draw_signal_dest and only one
of them supplies an immediate value (add_index == 0) the others do not use
the immediate value, but it is set to 0L.

In the solution to the second problem I am considering changing %load/vp0
to take the result width not the vector width. The vector does contain
width information and I'm using that when copying bits to the result. I
could add another parameter, but then %load/vp0 would have 4 and that will
require increasing the size of the opcode table.

Cary


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