iverilog-devel

[Iverilog-devel] Iverilog support for synthesis thargeting Virtex - 4 FPGA - Reg.

[Ravi S. <rav...@gm...>]

I am using Icarus Verilog 0.8.6, the one which supports synthesis.
When I tried to synthesis a Verilog file targeting Virtex -4 FPGA, I have
got a command that there is no such target.

Can you please suggest me the Icarus tool version that supports Virtex - 4
FPGA based synthesis.
-- 
Ravi. S

Re: [Iverilog-devel] Iverilog support for synthesis thargeting Virtex - 4 FPGA - Reg.

[Stephen W. <st...@ic...>]

Strictly speaking, no version synthesizes directly to any FPGA,
and all versions support simulation for any target. Let me
explain:

Synthesis all the way down to a specific technology is not
directly supported by Icarus Verilog. We made the conscious
choice that the vendors are never going to make it easy and
will generally provide free tools to target their devices
anyhow, so it is better to let the vendor provide the synthesizers.
In your case, xst from WebPack should work fine for you.

Simulation is a different story, and Icarus Verilog tries to
support as wide a field as possible, and many people do indeed
use it to simulate designs intended for Xilinx and other FPGA
devices. I recommend v10 for that.

The synthesis support that Icarus Verilog does have is for
more generic targets, i.e. BLIF and sizer, or as a foundation
for a 3rd party to provide their own code generator to target
odd devices. In this case, the 0.8 synthesis has since been
outrun by v10 synthesis support.

On 04/12/2016 10:45 AM, Ravi Selvaraj wrote:
> I am using Icarus Verilog 0.8.6, the one which supports synthesis.
> When I tried to synthesis a Verilog file targeting Virtex -4 FPGA, I
> have got a command that there is no such target.
> 
> Can you please suggest me the Icarus tool version that supports Virtex -
> 4 FPGA based synthesis.
> -- 
> Ravi. S


-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."

Re: [Iverilog-devel] Iverilog support for synthesis thargeting Virtex - 4 FPGA - Reg.

[Ravi S. <rav...@gm...>]

Thank You very much for that valuable suggestion of using Icarus Verilog
V10 for synthesis.
As per your guidelines given with the tool I will try with that.

One point I got a doubt is that in Iverilog 0.8.6, there are commands like:

iverilog -parch=virtex -ppart=v50-pq240-6 -tfpga foo.vl

Are there any such commands for BLIF file generation with Icarus. If so
please convey the
suitable version of Xilinx ISE that supports BLIF. I mean, how to get it
synthesized to measure the hardware area
and power consumption of the design?


On Tue, Apr 12, 2016 at 11:34 PM, Stephen Williams <st...@ic...> wrote:

>
> Strictly speaking, no version synthesizes directly to any FPGA,
> and all versions support simulation for any target. Let me
> explain:
>
> Synthesis all the way down to a specific technology is not
> directly supported by Icarus Verilog. We made the conscious
> choice that the vendors are never going to make it easy and
> will generally provide free tools to target their devices
> anyhow, so it is better to let the vendor provide the synthesizers.
> In your case, xst from WebPack should work fine for you.
>
> Simulation is a different story, and Icarus Verilog tries to
> support as wide a field as possible, and many people do indeed
> use it to simulate designs intended for Xilinx and other FPGA
> devices. I recommend v10 for that.
>
> The synthesis support that Icarus Verilog does have is for
> more generic targets, i.e. BLIF and sizer, or as a foundation
> for a 3rd party to provide their own code generator to target
> odd devices. In this case, the 0.8 synthesis has since been
> outrun by v10 synthesis support.
>
> On 04/12/2016 10:45 AM, Ravi Selvaraj wrote:
> > I am using Icarus Verilog 0.8.6, the one which supports synthesis.
> > When I tried to synthesis a Verilog file targeting Virtex -4 FPGA, I
> > have got a command that there is no such target.
> >
> > Can you please suggest me the Icarus tool version that supports Virtex -
> > 4 FPGA based synthesis.
> > --
> > Ravi. S
>
>
> --
> Steve Williams                "The woods are lovely, dark and deep.
> steve at icarus.com           But I have promises to keep,
> http://www.icarus.com         and lines to code before I sleep,
> http://www.picturel.com       And lines to code before I sleep."
>
>
> ------------------------------------------------------------------------------
> Find and fix application performance issues faster with Applications
> Manager
> Applications Manager provides deep performance insights into multiple
> tiers of
> your business applications. It resolves application problems quickly and
> reduces your MTTR. Get your free trial!
> https://ad.doubleclick.net/ddm/clk/302982198;130105516;z
> _______________________________________________
> Iverilog-devel mailing list
> Ive...@li...
> https://lists.sourceforge.net/lists/listinfo/iverilog-devel
>



-- 
Ravi. S
Assistant Professor
ECE Dept

Re: [Iverilog-devel] Iverilog support for synthesis thargeting Virtex - 4 FPGA - Reg.

[Larry D. <ldo...@re...>]

Ravi -

On Wed, Apr 13, 2016 at 11:32:37AM +0530, Ravi Selvaraj wrote:
> Are there any such commands for BLIF file generation with Icarus.

It sounds like you might be happier with Yosys
http://www.clifford.at/yosys/about.html

  - Larry

Re: [Iverilog-devel] Iverilog support for synthesis thargeting Virtex - 4 FPGA - Reg.

[Stephen W. <st...@ic...>]

I think you are missing the point. Icarus Verilog synthesis will
never be up to what you can get for free from Xilinx (for Xilinx
parts) so you are better off using Xilinx tools for synthesis.
We recommend that you follow that path. Use Icarus Verilog for
simulation, but use xst (or Vivado) for synthesis.

On 04/12/2016 11:02 PM, Ravi Selvaraj wrote:
> Thank You very much for that valuable suggestion of using Icarus Verilog
> V10 for synthesis.
> As per your guidelines given with the tool I will try with that.
> 
> One point I got a doubt is that in Iverilog 0.8.6, there are commands like:
> 
> iverilog -parch=virtex -ppart=v50-pq240-6 -tfpga foo.vl
> 
> Are there any such commands for BLIF file generation with Icarus. If so
> please convey the
> suitable version of Xilinx ISE that supports BLIF. I mean, how to get it
> synthesized to measure the hardware area
> and power consumption of the design?
> 
> 
> On Tue, Apr 12, 2016 at 11:34 PM, Stephen Williams <st...@ic...
> <mailto:st...@ic...>> wrote:
> 
> 
>     Strictly speaking, no version synthesizes directly to any FPGA,
>     and all versions support simulation for any target. Let me
>     explain:
> 
>     Synthesis all the way down to a specific technology is not
>     directly supported by Icarus Verilog. We made the conscious
>     choice that the vendors are never going to make it easy and
>     will generally provide free tools to target their devices
>     anyhow, so it is better to let the vendor provide the synthesizers.
>     In your case, xst from WebPack should work fine for you.
> 
>     Simulation is a different story, and Icarus Verilog tries to
>     support as wide a field as possible, and many people do indeed
>     use it to simulate designs intended for Xilinx and other FPGA
>     devices. I recommend v10 for that.
> 
>     The synthesis support that Icarus Verilog does have is for
>     more generic targets, i.e. BLIF and sizer, or as a foundation
>     for a 3rd party to provide their own code generator to target
>     odd devices. In this case, the 0.8 synthesis has since been
>     outrun by v10 synthesis support.
> 
>     On 04/12/2016 10:45 AM, Ravi Selvaraj wrote:
>     > I am using Icarus Verilog 0.8.6, the one which supports synthesis.
>     > When I tried to synthesis a Verilog file targeting Virtex -4 FPGA, I
>     > have got a command that there is no such target.
>     >
>     > Can you please suggest me the Icarus tool version that supports
>     Virtex -
>     > 4 FPGA based synthesis.
>     > --
>     > Ravi. S
> 
> 
>     --
>     Steve Williams                "The woods are lovely, dark and deep.
>     steve at icarus.com <http://icarus.com>           But I have
>     promises to keep,
>     http://www.icarus.com         and lines to code before I sleep,
>     http://www.picturel.com       And lines to code before I sleep."
> 
>     ------------------------------------------------------------------------------
>     Find and fix application performance issues faster with Applications
>     Manager
>     Applications Manager provides deep performance insights into
>     multiple tiers of
>     your business applications. It resolves application problems quickly and
>     reduces your MTTR. Get your free trial!
>     https://ad.doubleclick.net/ddm/clk/302982198;130105516;z
>     _______________________________________________
>     Iverilog-devel mailing list
>     Ive...@li...
>     <mailto:Ive...@li...>
>     https://lists.sourceforge.net/lists/listinfo/iverilog-devel
> 
> 
> 
> 
> -- 
> Ravi. S
> Assistant Professor
> ECE Dept
> 
> 
> 
> ------------------------------------------------------------------------------
> Find and fix application performance issues faster with Applications Manager
> Applications Manager provides deep performance insights into multiple tiers of
> your business applications. It resolves application problems quickly and
> reduces your MTTR. Get your free trial!
> https://ad.doubleclick.net/ddm/clk/302982198;130105516;z
> 
> 
> 
> _______________________________________________
> Iverilog-devel mailing list
> Ive...@li...
> https://lists.sourceforge.net/lists/listinfo/iverilog-devel
> 


-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."