-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256
As I know Cary is currently working reworking the dynamic array
routines, so to avoid disruption I propose a minor update [1] that
allows to use non 8 multiple width vectors with dynamic arrays.
Taking the opportunity, I would like to express my gratitude to Cary
for fixes in dynamic arrays <-> vectors conversion code.
It seems that finally I have unwinded the stack of dependencies for
VHDL subprograms taking advantage of unbounded vectors, so now I am
back to vhdlpp development. For the moment, there is only a small
change that allows to use array size attributes ('range, 'left,
'right) in subprograms.
Both mentioned features are covered with tests [2]. Have a nice weekend!
Regards,
Orson
1. https://github.com/steveicarus/iverilog/pull/51
2. https://github.com/orsonmmz/ivtest/tree/vhdl_range_func_test
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQEcBAEBCAAGBQJUuVHDAAoJEBRwGu1hpbJ1LMcH/A55vi28ZsO0SU6ajI0DwDDt
7jhMFxR2LBcIUPvVFs/lrLRQ35GV9okciKP0rdB56olI0ZLFbSnQ0Cg4VT7dYSQd
rPOOQoK7d/ruwP0qi8zZ0m1dOMqtY2aPG+LM51tkpdCFqGyF48mFqbJhFKKD1fXF
zU5HvfA/xcV+9fNyNylc8MwnhDfFP09ea8xET3/h1phJCp6UfYJjjX7tueumV3Ed
gLAu4Lm268VrkYCEmlI1GM/kuvJZhezRJ1gbUvHMAno3eaZ01BZop5F6OD2qMgNO
f4/oX2ZBLX2ObtxrvCnDFDHAMYS39d6/VOCCEr+s3zwkvqnbB83ZhQNSnHY8kvw=
=+osP
-----END PGP SIGNATURE-----
|
