Thread: [Iverilog-devel] patch proposal for vhdlpp

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Dears,

we are willing to use icarus compiler to simulate VHDL code 
automatically generated by our framework. Details of our framework could 
be found at panda.dei.polim.it or at http://www.ohwr.org/projects/panda.
Our framework synthesizes HLD starting from ANSI C code exploiting the 
GCC intermediate representation. We already exploit Icarus as Verilog 
simulator and we are interested in the VHDL support you are developing.
Currently, VHDL is needed only in case the source C code has floating 
point operations. Later, we will generate a full VHDL synthesizable 
description. The VHDL cores are generated exploiting the FloPoCo library 
(http://flopoco.gforge.inria.fr/).
Checking the VHDL code we generate we have few things not supported by 
Icarus.

The first one is related to the library standard usage. The floating 
point cores we generated have always this header:

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
library std;
use std.textio.all;
library work;

The lines that drives crazy icarus/vhdlpp is the references to library 
standard. According to the standard we have that:
Every design unit [...] is assumed to contain the following implicit 
context items [...]:
library STD, WORK; use STD.STANDARD.all;

So having or not having such lines is the same. So, I've created a patch 
that should fix the problem.
The fix is lazy w.r.t. the package textio. A better solution is to parse 
or to exploit pre-compiled standard libraries.
So the first question is: do you plan to add a support for pre-compiled 
standard packages?

Another blocking thing we have with the VHDL code not supported is the 
use of with ... select statements.
Is there someone that is working to add this type of statements. In case 
no one is working on this type of statement we may try to add its support.

Thanks,

Fabrizio

-- 
-------------------------------------------------------------------
  Name:                  Fabrizio Ferrandi
  Department:            Dipartimento di Elettronica Informazione
                         e Bioingegneria
  Organization:          Politecnico di Milano
  Address:               Piazza Leonardo Da Vinci, 32
  z.i.p./City:           I-20133 Milano
  Country:               Italy
  Phone:                 +39 02 2399 3479
  Fax:                   +39 02 2399 3411
  E-mail:                fab...@po...
  www:                   http://www.deib.polimi.it/people/ferrandi
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Thread: [Iverilog-devel] patch proposal for vhdlpp

iverilog-devel