Thread: Re: [Iverilog-devel] How to get more information when internal errors happen

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iverilog-devel

Re: [Iverilog-devel] How to get more information when internal errors happen

From: Larry D. <ldo...@re...> - 2008-01-25 18:13:57

Hi -

To get debug_elaborate turned on without recompiling, do

IVERILOG_ICONFIG=foo.conf iverilog -v -Wall test_tb.v

then add

debug:elaborate

to the resulting foo.conf, and (assuming you don't have any
actual preprocessor activity) rerun the ivl command printed
by the above iverilog -v trace, except ending with test_tb.v
instead of --.  This process is hinted at in the iverilog
man page, in the description of the -v flag.

This particular bug looks like it's in the vvp code generator.
It prints out

L_0x81cde48 .concat [ 4 2 0 0], C4<0000>, L_0x81cdef0;

but the second width (2) should really be 0.
The code that prints the erroneous 2 is in tgt-vvp/vvp_scope.c:1828,
function lpm_concat_inputs().  I didn't trace back width_of_nexus()
yet to see where the bug really is.  The elaborated design itself
looks correct.

   - Larry

Re: [Iverilog-devel] How to get more information when internal errors happen

From: Stephen W. <st...@ic...> - 2008-01-25 18:33:37

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Larry Doolittle wrote:
> This particular bug looks like it's in the vvp code generator.
> It prints out
> 
> L_0x81cde48 .concat [ 4 2 0 0], C4<0000>, L_0x81cdef0;
> 
> but the second width (2) should really be 0.
> The code that prints the erroneous 2 is in tgt-vvp/vvp_scope.c:1828,
> function lpm_concat_inputs().  I didn't trace back width_of_nexus()
> yet to see where the bug really is.  The elaborated design itself
> looks correct.

The elaboration is probably *not* correct if L_0x81cdef0 is
thought to be width of zero. It looks like the concat writer
thinks it should be width of 2.

At this point, the -tstub target may be the needed magic. That
code generator doubles as a compiler sanity checker and may detect
the bad situation here. Just run iverilog -v -Wall -tstub test_tb.v
and see if the resulting a.out has ERROR strings in it anywhere.

- --
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."
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Re: [Iverilog-devel] How to get more information when internal errors happen

From: Larry D. <ldo...@re...> - 2008-01-25 18:42:51

On Fri, Jan 25, 2008 at 10:33:40AM -0800, Stephen Williams wrote:
> Larry Doolittle wrote:
> > This particular bug looks like it's in the vvp code generator.
> > It prints out
> > L_0x81cde48 .concat [ 4 2 0 0], C4<0000>, L_0x81cdef0;
> > but the second width (2) should really be 0. [chop]
> > The elaborated design itself looks correct.
> 
> The elaboration is probably *not* correct if L_0x81cdef0 is
> thought to be width of zero. It looks like the concat writer
> thinks it should be width of 2.

L_0x81cdef0 is thought to be width of zero.
The output from debug:elaborate shows the second concatenate
input has width 0.  The concat output of vvp code generator
is the first place the error appears.

> At this point, the -tstub target may be the needed magic. That
> code generator doubles as a compiler sanity checker and may detect
> the bad situation here. Just run iverilog -v -Wall -tstub test_tb.v
> and see if the resulting a.out has ERROR strings in it anywhere.

That's cool magic.  ;-)

  LPM_CONCAT _s3: <width=4, inputs=2>
    O: test.a_int
    I0: test._s1 (width=4)
    I1: test._s5 (width=2)
    ERROR! Got 6 bits input, expecting 4!
  LPM_PART_VP _s4: <width=0, base=0, signed=0>
    O: test._s5
    I: test.A
    ERROR: Part select input mistatch. Nexus width=2, expect width=0

   - Larry

Re: [Iverilog-devel] How to get more information when internal errors happen

From: Cary R. <cy...@ya...> - 2008-01-25 18:52:53

I believe the problem is in the elaboration code for the shift operators
when used in a continuous assignment (elab_net.cc). This particular case
looks like it could be optimized to just a constant since the constant
shift is as wide as the input vector.

Cary


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Re: [Iverilog-devel] How to get more information when internal errors happen

From: Larry D. <ldo...@re...> - 2008-01-25 18:56:10

On Fri, Jan 25, 2008 at 10:42:57AM -0800, Larry Doolittle wrote:
> The concat output of vvp code generator
> is the first place the error appears.

I'm getting rather confused.  I just tried to reproduce the error
on amd64, and could not.  Both iverilog's supposedly were built from
the same source tree.

On Fri, Jan 25, 2008 at 10:13:59AM -0800, Larry Doolittle wrote:
> add debug:elaborate 
> to the resulting foo.conf, and (assuming you don't have any
> actual preprocessor activity) rerun the ivl command

See if you like the appended patch.  It's pretty simple, and lets
you say "iverilog -d elaborate" to get the desired effect.
I'm not sure 'd' is the best letter to use, and documentation
needs to be added.

   - Larry


--- /home/ldoolitt/git/verilog/driver/main.c	2008-01-02 11:23:05.000000000 -0800
+++ driver/main.c	2008-01-25 10:46:21.000000000 -0800
@@ -593,7 +593,7 @@
 	}
       }
 
-      while ((opt = getopt(argc, argv, "B:c:D:Ef:g:hI:M:m:N::o:p:Ss:T:t:vVW:y:Y:")) != EOF) {
+      while ((opt = getopt(argc, argv, "B:c:D:d:Ef:g:hI:M:m:N::o:p:Ss:T:t:vVW:y:Y:")) != EOF) {
 
 	    switch (opt) {
 		case 'B':
@@ -620,6 +620,9 @@
 		case 'p':
 		  fprintf(iconfig_file, "flag:%s\n", optarg);
 		  break;
+		case 'd':
+		  fprintf(iconfig_file, "debug:%s\n", optarg);
+		  break;
 
 		case 'g':
 		  rc = process_generation(optarg);

Re: [Iverilog-devel] How to get more information when internal errors happen

From: Cary R. <cy...@ya...> - 2008-01-25 19:02:59

--- Larry Doolittle <ldo...@re...> wrote:

> I'm getting rather confused.  I just tried to reproduce the error
> on amd64, and could not.  Both iverilog's supposedly were built from
> the same source tree.

FYI the code from the bug tracker fails on both RHEL 4 and cygwin.

Cary


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Re: [Iverilog-devel] How to get more information when internal errors happen

From: Stephen W. <st...@ic...> - 2008-01-25 19:18:26

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Larry Doolittle wrote:
> See if you like the appended patch.  It's pretty simple, and lets
> you say "iverilog -d elaborate" to get the desired effect.
> I'm not sure 'd' is the best letter to use, and documentation
> needs to be added.

I like it just fine. It looks like just what the doctor ordered,
so I tool the liberty of pushing it into git.

- --
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."
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