#995 assertion in synth2 when attempting to process dpram

[Larry Doolittle]

$ iverilog -V | grep "version 1"
Icarus Verilog version 11.0 (devel) (s20150603-96-g19009ec)
Icarus Verilog Preprocessor version 11.0 (devel) (s20150603-96-g19009ec)
Icarus Verilog Parser/Elaborator version 11.0 (devel) (s20150603-96-g19009ec)
$ iverilog -Wall dpram.v
$ iverilog -Wall dpram.v -tsizer
dpram.v:13: assert: synth2.cc:232: failed assertion nex_out.pin_count()==1
Aborted

This is from the most basic dpram model imaginable.

[Larry Doolittle]

Here's a simple patch to turn the assertion error into a halfway-legible "unsupported" message. I don't see synthesis code for RAM in there now. After application, synthesis still fails, but the message becomes

$ iverilog -Wall dpram.v -tsizer

dpram.v:13: error: NetAssignBase::synth_async on unsupported lval {mem[word=<select=addra[7:0][(0)+:10] expr_type=logic>]}

dpram.v:13: error: Unable to synthesize synchronous process.

dpram.v:12: warning: Process not synthesized.

2 error(s) in post-elaboration processing.

[Martin Whitaker]

I've pushed an enhanced version of your patch to the master and v-10 branches. I needed to add a check for the memory index being constant, as that is supported (and used in the memsynth4 test in the test suite). I took the opportunity to add a more helpful error message.

Do you want to close this bug, or keep it open as a feature request?

[Larry Doolittle]

Martin -

On Sat, Jan 30, 2016 at 05:15:24PM +0000, Martin Whitaker wrote:

I've pushed an enhanced version of your patch to the master and v-10 branches. I needed to add a check for the memory index being constant, as that is supported (and used in the memsynth4 test in the test suite). I took the opportunity to add a more helpful error message.

I see that. Thanks!

Do you want to close this bug, or keep it open as a feature request?

I say close it. A sorry message is not a crash.

• Larry

[Martin Whitaker]

Done!