Icarus Verilog / Bugs / #991 segfault compling empty default case

#991 segfault compling empty default case

Milestone: devel

Status: closed-fixed

Labels: None

Priority: 5

Updated: 2015-08-17

Created: 2015-08-16

Private: No

While the test case source is VHDL, the segfault is in the elaboration step, not vhdlpp.

1 Attachments

bug6.vhd

Martin Whitaker - 2015-08-17

assigned_to: Martin Whitaker
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Martin Whitaker - 2015-08-17

status: open --> closed-fixed
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Martin Whitaker - 2015-08-17

Should be fixed now in both devel and v10.

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