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#956 sv package enumerated type and function

devel
closed-fixed
Cary R.
None
5
2014-11-04
2014-08-21
ermejdri
No

Please find attached iv_test1.sv which gives the following output with the current repository. This passes with Modelsim. When the function is moved to the module it finishes elaboration.

Best regards,
--Eric

easys-Mac-Pro:XXXXXX XXXXXXXXX$ iverilog -g2012 -d elaborate -s a iv_bug.sv
debug: Enable elaborate debug
iv_bug.sv:3: elab_and_eval: test_width of 'sd4
iv_bug.sv:3: : returns type=logic, width=4, signed=1, mode=lossless
iv_bug.sv:3: : cast_type=<no_type>
iv_bug.sv:3: elab_and_eval: test_width of 'sd0
iv_bug.sv:3: : returns type=logic, width=1, signed=1, mode=lossless
iv_bug.sv:3: : cast_type=<no_type>
iv_bug.sv:5: elab_and_eval: test_width of 'sd0
iv_bug.sv:5: : returns type=logic, width=1, signed=1, mode=lossless
iv_bug.sv:5: : cast_type=<no_type>
iv_bug.sv:6: elab_and_eval: test_width of 'sd1
iv_bug.sv:6: : returns type=logic, width=2, signed=1, mode=lossless
iv_bug.sv:6: : cast_type=<no_type>
iv_bug.sv:7: elab_and_eval: test_width of 'sd2
iv_bug.sv:7: : returns type=logic, width=3, signed=1, mode=lossless
iv_bug.sv:7: : cast_type=<no_type>
iv_bug.sv:10: elaborate_sig_funcs: Elaborate function func1 in test_pkg.func1
Assertion failed: (tmp != 0), function enumeration_for_name, file net_scope.cc, line 79.
sh: line 1: 15806 Done /usr/local/lib/ivl/ivlpp -L -F"/var/folders/vn/5bg6l3yx73g3sj2gpfc32lhr0000gp/T//ivrlg2fd501a4" -f"/var/folders/vn/5bg6l3yx73g3sj2gpfc32lhr0000gp/T//ivrlgfd501a4" -p"/var/folders/vn/5bg6l3yx73g3sj2gpfc32lhr0000gp/T//ivrlifd501a4"
15807 Abort trap: 6 | /usr/local/lib/ivl/ivl -C"/var/folders/vn/5bg6l3yx73g3sj2gpfc32lhr0000gp/T//ivrlhfd501a4" -C"/usr/local/lib/ivl/vvp.conf" -- -

$ vlog iv_test1.sv
Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov 2 2012
-- Compiling package test_pkg
-- Compiling module a
-- Importing package test_pkg

Top level modules:
a

$ vsim -c work.a
Reading C:/altera/13.0sp1/modelsim_ase/tcl/vsim/pref.tcl

10.1d

vsim -c work.a

Loading sv_std.std

Loading work.test_pkg

Loading work.a

VSIM 1> run -all
run -all

PASSED

** Note: $finish : iv_test1.sv(37)

Time: 0 ps Iteration: 0 Instance: /a

1 Attachments

Related

Bugs: #956

Discussion

  • Cary R.

    Cary R. - 2014-08-28
    • assigned_to: Cary R.
     
  • Cary R.

    Cary R. - 2014-08-28

    I am looking at this issue. I am confused by your comment saying that moving the function to the module allows the code to finish elaboration. Does this imply it doesn't crash Icarus or does it produces code that runs? From what I can see it is crashing no matter where the function is located. I have some of this figured out, but there are multiple issues and I don't have them all figured out.

     
  • Cary R.

    Cary R. - 2014-08-28

    I have pushed a patch that fixes some of the issues your code uncovered. The remaining issue is that the compiler does not currently recognize that the enumeration variable in the module and the enumeration constant referenced out of the package are the same type. I plan to look at this later, though I need to review the standard a bit to make sure what I am planning to do is correct.

     
    • ermejdri

      ermejdri - 2014-08-28

      Hi Cary, thanks. On your previous comment, yes sorry, you are correct.
      Moving the function into the module caused Icarus to not crash (I just
      built from git latest), but it still did not run. I have several
      regression tests related to enums, structs, and unions in packages that I
      will also be posting - the tests are all boiled down from a multi GHz OoO
      CPU design completely coded in SV which makes extensive use of packages,
      structs, unions, enumerated types, etc.

      Cheers!
      --Eric

      On Thu, Aug 28, 2014 at 1:11 PM, Cary R. caryr@users.sf.net wrote:

      I have pushed a patch that fixes some of the issues your code uncovered.
      The remaining issue is that the compiler does not currently recognize that
      the enumeration variable in the module and the enumeration constant
      referenced out of the package are the same type. I plan to look at this
      later, though I need to review the standard a bit to make sure what I am
      planning to do is correct.


      Status: open
      Group: devel
      Created: Thu Aug 21, 2014 03:30 AM UTC by ermejdri
      Last Updated: Thu Aug 28, 2014 02:48 AM UTC
      Owner: Cary R.

      Please find attached iv_test1.sv which gives the following output with
      the current repository. This passes with Modelsim. When the function is
      moved to the module it finishes elaboration.

      Best regards,
      --Eric

      easys-Mac-Pro:XXXXXX XXXXXXXXX$ iverilog -g2012 -d elaborate -s a
      iv_bug.sv
      debug: Enable elaborate debug
      iv_bug.sv:3: elab_and_eval: test_width of 'sd4
      iv_bug.sv:3: : returns type=logic, width=4, signed=1, mode=lossless
      iv_bug.sv:3: : cast_type=<no_type>
      iv_bug.sv:3: elab_and_eval: test_width of 'sd0
      iv_bug.sv:3: : returns type=logic, width=1, signed=1, mode=lossless
      iv_bug.sv:3: : cast_type=<no_type>
      iv_bug.sv:5: elab_and_eval: test_width of 'sd0
      iv_bug.sv:5: : returns type=logic, width=1, signed=1, mode=lossless
      iv_bug.sv:5: : cast_type=<no_type>
      iv_bug.sv:6: elab_and_eval: test_width of 'sd1
      iv_bug.sv:6: : returns type=logic, width=2, signed=1, mode=lossless
      iv_bug.sv:6: : cast_type=<no_type>
      iv_bug.sv:7: elab_and_eval: test_width of 'sd2
      iv_bug.sv:7: : returns type=logic, width=3, signed=1, mode=lossless
      iv_bug.sv:7: : cast_type=<no_type>
      iv_bug.sv:10: elaborate_sig_funcs: Elaborate function func1 in
      test_pkg.func1
      Assertion failed: (tmp != 0), function enumeration_for_name, file
      net_scope.cc, line 79.
      sh: line 1: 15806 Done /usr/local/lib/ivl/ivlpp -L
      -F"/var/folders/vn/5bg6l3yx73g3sj2gpfc32lhr0000gp/T//ivrlg2fd501a4"
      -f"/var/folders/vn/5bg6l3yx73g3sj2gpfc32lhr0000gp/T//ivrlgfd501a4"
      -p"/var/folders/vn/5bg6l3yx73g3sj2gpfc32lhr0000gp/T//ivrlifd501a4"
      15807 Abort trap: 6 | /usr/local/lib/ivl/ivl
      -C"/var/folders/vn/5bg6l3yx73g3sj2gpfc32lhr0000gp/T//ivrlhfd501a4"
      -C"/usr/local/lib/ivl/vvp.conf" -- -

      $ vlog iv_test1.sv
      Model Technology ModelSim ALTERA vlog 10.1d Compiler 2012.11 Nov 2 2012
      -- Compiling package test_pkg
      -- Compiling module a
      -- Importing package test_pkg

      Top level modules:
      a

      $ vsim -c work.a
      Reading C:/altera/13.0sp1/modelsim_ase/tcl/vsim/pref.tcl
      10.1d vsim -c work.a Loading sv_std.std Loading work.test_pkg Loading
      work.a

      VSIM 1> run -all
      run -all
      PASSED ** Note: $finish : iv_test1.sv(37) Time: 0 ps Iteration: 0
      Instance: /a


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      Related

      Bugs: #956

  • ermejdri

    ermejdri - 2014-09-17

    Hi Cary, a follow-up question: These designs make extensive use of SV interfaces both as containers for complex interfaces between functional units and as verification hooks. Looking at the iv_tests suite I see a single SV interface test which doesn't look like it gets run as part of running a regression. Should I assume that there is no SV interface support at this time?

    Best regards,
    --Eric

     
  • Cary R.

    Cary R. - 2014-09-17

    Hi Eric,

    That is correct interfaces are not currently supported. We may have someone interested in sponsoring their addition, but nothing definitive at this time. The initial proposal Steve gave was just for basic support.

     
  • Cary R.

    Cary R. - 2014-11-04
    • status: open --> closed-fixed
     
  • Cary R.

    Cary R. - 2014-11-04

    I have pushed a fix for the final issue that your test code uncovered. There have been other improvements in enumeration elaboration that I have also pushed recently.

     

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