#1017 iverilog creates infinite loop

[Evan Lavelle]

git, v10-branch

Extract the two files and compile as:

iverilog test.v counter1R.v

the resulting output enters an infinite loop. This is an old (compiler-generated) test, which passed on v0.9 and various other compilers.

[Cary R.]

I can confirm that both V10 and devel are advancing in time, but the simulations did not produce any output or finish. V0.9 did produce output and completed.

[Martin Whitaker]

And again, commenting out the disable statements results in the test running to completion with output:

trigFunctionC: Q is 4; time 40 ns
trigFunctionA: Q is 9; time 80 ns
trigFunctionA 1: time 88 ns
trigFunctionA 2: time 96 ns
trigFunctionA 3: time 104 ns
trigFunctionB: Q is 3; time 160 ns
trigFunctionA: Q is 9; time 208 ns
trigFunctionA 1: time 216 ns
trigFunctionA 2: time 224 ns
trigFunctionA 3: time 232 ns
(Log)        (256 ns) 40 vectors executed (40 passes, 0 fails)

which presumably is the expected result.

[Martin Whitaker]

This should now be fixed in both the master and v10 branches. Please reopen this bug if you find otherwise.