Over the next few days I'll be uploading the modules of the hardware H264 video compression system, along with test vectors and and test output run on software derived from the JM 14.0 H264 reference software.
Currently all major modules (eg, coretransform, cavlc, ...) are coded and tested, but the modules have been designed to be flexible so certain ones can be replaced if needed, either for faster or smaller code, or to vary the behaviour.
No limits to resolution are set in the modules, and multiple streams may be encoded simultaneously. The only limit is storage which is at the top level of the design, not encoded in modules.
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Thanks for the great body of work here (also thanks to Tony George for the excellent codec discussion on his site). I was curious about the capability of the core in terms of input bit rates (as a function of resolution and frame rate). What Fmax did you find for the Cyclone III parts, and what is the corresponding throughput?
Again, great stuff!
Kevin
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Hi Andy Henson,
you have done a tremendous job, i really want to praise your work.
i have a BE project on video compression implementation on FPGA. I was dazzled to find your work. But i need some help in using it , can i get some guidence in how to use it?
please help
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Over the next few days I'll be uploading the modules of the hardware H264 video compression system, along with test vectors and and test output run on software derived from the JM 14.0 H264 reference software.
Currently all major modules (eg, coretransform, cavlc, ...) are coded and tested, but the modules have been designed to be flexible so certain ones can be replaced if needed, either for faster or smaller code, or to vary the behaviour.
No limits to resolution are set in the modules, and multiple streams may be encoded simultaneously. The only limit is storage which is at the top level of the design, not encoded in modules.
I guess there's more than one FPGA chip required to actually decompress in real-time, right?
Dear Andy Henson,
It is a really an appreciable work you have done here. I reviewed the code and found it as a good quality one. Thanks for your efforts.
Tony Gladvin George
drtonygeorge.com
Hi Andy,
Thanks for the great body of work here (also thanks to Tony George for the excellent codec discussion on his site). I was curious about the capability of the core in terms of input bit rates (as a function of resolution and frame rate). What Fmax did you find for the Cyclone III parts, and what is the corresponding throughput?
Again, great stuff!
Kevin
I did build it for Altera parts, but I don't have throughput figures for the Cyclone III.
Hi Andy Henson,
you have done a tremendous job, i really want to praise your work.
i have a BE project on video compression implementation on FPGA. I was dazzled to find your work. But i need some help in using it , can i get some guidence in how to use it?
please help
Hello
I didn't find the motion estimation block for this h264 encoder ,can anyone help?