From: Tom C. <TCalef@HatchScience.com> - 2011-01-12 15:59:46
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Steve, Thanks for the reply, it looks like I have some module that wasn't linked right or something.. here is my boot log. Also, could you send your boot args? One of my problems other than setting the clock to 600MHz is that I think I'm running out of memory because my memory map isn't correct. I see that yours is much more explicit stating which memory is where. I have a 256mb board, but it looks like I only have 100mb assigned, and the kernel may not be using it correctly. Thanks! Tom Machine: Gumstix Overo Memory policy: ECC disabled, Data cache writeback OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp 720m ) SRAM: Mapped pa 0x40200000 to va 0xfe400000 size: 0x100000 Reserving 12582912 bytes SDRAM for VRAM Built 1 zonelists in Zone order, mobility grouping on. Total pages: 25400 Kernel command line: console=ttyS2,115200n8 mpurate=600 vram=12M mem=100M omapfb.mode=dvi:1024x768MR-16@60 omapfb.debug=y omapdss.def_disp=dvi root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait PID hash table entries: 512 (order: -1, 2048 bytes) Dentry cache hash table entries: 16384 (order: 4, 65536 bytes) Inode-cache hash table entries: 8192 (order: 3, 32768 bytes) Memory: 100MB = 100MB total Memory: 82716KB available (5388K code, 616K data, 164K init, 0K highmem) Hierarchical RCU implementation. NR_IRQS:402 Clocking rate (Crystal/Core/MPU): 26.0/224/500 MHz Reprogramming SDRC clock to 224791666 Hz dpll3_m2_clk rate change failed: -22 GPMC revision 5.0 IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts Total of 96 interrupts on 1 active controller OMAP GPIO hardware version 2.5 OMAP clockevent source: GPTIMER1 at 32768 Hz Console: colour dummy device 80x30 Calibrating delay loop... 499.92 BogoMIPS (lpj=1949696) Mount-cache hash table entries: 512 CPU: Testing write buffer coherency: ok tmpfs: No value for mount option 'mode' devtmpfs: initialized regulator: core version 0.5 NET: Registered protocol family 16 Found NAND on CS0 Registering NAND on CS0 ------------[ cut here ]------------ WARNING: at arch/arm/mach-omap2/clock34xx.c:456 omap2_clk_arch_init+0x38/0x1e8() OPP table not defined for MPU Modules linked in: [<c00366cc>] (unwind_backtrace+0x0/0xdc) from [<c005dd60>] (warn_slowpath_common+0x48/0x60) [<c005dd60>] (warn_slowpath_common+0x48/0x60) from [<c005ddb0>] (warn_slowpath_fmt+0x24/0x30) [<c005ddb0>] (warn_slowpath_fmt+0x24/0x30) from [<c000fa0c>] (omap2_clk_arch_init+0x38/0x1e8) [<c000fa0c>] (omap2_clk_arch_init+0x38/0x1e8) from [<c003133c>] (do_one_initcall+0x5c/0x1b4) [<c003133c>] (do_one_initcall+0x5c/0x1b4) from [<c00083f8>] (kernel_init+0x90/0x10c) [<c00083f8>] (kernel_init+0x90/0x10c) from [<c003287c>] (kernel_thread_exit+0x0/0x8) ---[ end trace 1b75b31a2719ed1c ]--- ------------[ cut here ]------------ WARNING: at arch/arm/mach-omap2/clock34xx.c:460 omap2_clk_arch_init+0x6c/0x1e8() OPP table not defined for DSP Modules linked in: [<c00366cc>] (unwind_backtrace+0x0/0xdc) from [<c005dd60>] (warn_slowpath_common+0x48/0x60) [<c005dd60>] (warn_slowpath_common+0x48/0x60) from [<c005ddb0>] (warn_slowpath_fmt+0x24/0x30) [<c005ddb0>] (warn_slowpath_fmt+0x24/0x30) from [<c000fa40>] (omap2_clk_arch_init+0x6c/0x1e8) [<c000fa40>] (omap2_clk_arch_init+0x6c/0x1e8) from [<c003133c>] (do_one_initcall+0x5c/0x1b4) [<c003133c>] (do_one_initcall+0x5c/0x1b4) from [<c00083f8>] (kernel_init+0x90/0x10c) [<c00083f8>] (kernel_init+0x90/0x10c) from [<c003287c>] (kernel_thread_exit+0x0/0x8) ---[ end trace 1b75b31a2719ed1d ]--- ------------[ cut here ]------------ WARNING: at arch/arm/mach-omap2/clock34xx.c:463 omap2_clk_arch_init+0x90/0x1e8() OPP table not defined for L3 Modules linked in: [<c00366cc>] (unwind_backtrace+0x0/0xdc) from [<c005dd60>] (warn_slowpath_common+0x48/0x60) [<c005dd60>] (warn_slowpath_common+0x48/0x60) from [<c005ddb0>] (warn_slowpath_fmt+0x24/0x30) [<c005ddb0>] (warn_slowpath_fmt+0x24/0x30) from [<c000fa64>] (omap2_clk_arch_init+0x90/0x1e8) [<c000fa64>] (omap2_clk_arch_init+0x90/0x1e8) from [<c003133c>] (do_one_initcall+0x5c/0x1b4) [<c003133c>] (do_one_initcall+0x5c/0x1b4) from [<c00083f8>] (kernel_init+0x90/0x10c) [<c00083f8>] (kernel_init+0x90/0x10c) from [<c003287c>] (kernel_thread_exit+0x0/0x8) ---[ end trace 1b75b31a2719ed1e ]--- OMAP DMA hardware revision 4.0 -----Original Message----- From: Steve Sakoman [mailto:sa...@gm...] Sent: Tuesday, January 11, 2011 6:24 PM To: General mailing list for gumstix users. Subject: Re: [Gumstix-users] Overo FE - Clock wont go above 500MHz! On Mon, Jan 10, 2011 at 1:42 PM, Tom Calef <TC...@ha...> wrote: > My kernel command line is as follows: > Kernel command line: console=ttyS2,115200n8 mpurate=600 vram=12M > mem=100M omapfb.mode=dvi:1024x768MR-16@60 omapfb.debug=y > omapdss.def_disp=dvi root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait Could you send us a copy of your boot log so we can see what is going on during boot? If I do a "setenv mpurate 600" and then boot I get the following: Starting kernel ... Uncompressing Linux... done, booting the kernel. Linux version 2.6.36 (st...@bu...) (gcc version 4.3.3 (GCC) ) #1 Sun Jan 9 21:22:33 PST 2011 CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7f CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache Machine: Gumstix Overo Reserving 12582912 bytes SDRAM for VRAM Memory policy: ECC disabled, Data cache writeback OMAP3525 ES3.1 (l2cache iva neon isp ) SRAM: Mapped pa 0x40208000 to va 0xfe408000 size: 0x8000 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024 Kernel command line: console=ttyS2,115200n8 mpurate=600 vram=12M omapfb.mode=dvi:1024x768MR-16@60 omapdss.def_disp=dvi root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait PID hash table entries: 1024 (order: 0, 4096 bytes) Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) Memory: 128MB 128MB = 256MB total Memory: 241584k/241584k available, 20560k reserved, 0K highmem Virtual kernel memory layout: vector : 0xffff0000 - 0xffff1000 ( 4 kB) fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) DMA : 0xffc00000 - 0xffe00000 ( 2 MB) vmalloc : 0xd0800000 - 0xf8000000 ( 632 MB) lowmem : 0xc0000000 - 0xd0000000 ( 256 MB) modules : 0xbf000000 - 0xc0000000 ( 16 MB) .init : 0xc0008000 - 0xc0032000 ( 168 kB) .text : 0xc0032000 - 0xc0554000 (5256 kB) .data : 0xc0578000 - 0xc05b25e0 ( 234 kB) Hierarchical RCU implementation. RCU-based detection of stalled CPUs is disabled. Verbose stalled-CPUs detection is disabled. NR_IRQS:402 Clocking rate (Crystal/Core/MPU): 26.0/224/500 MHz Reprogramming SDRC clock to 224791666 Hz dpll3_m2_clk rate change failed: -22 GPMC revision 5.0 IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts Total of 96 interrupts on 1 active controller OMAP GPIO hardware version 2.5 OMAP clockevent source: GPTIMER1 at 32768 Hz Console: colour dummy device 80x30 Calibrating delay loop... 499.92 BogoMIPS (lpj=1949696) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 512 CPU: Testing write buffer coherency: ok devtmpfs: initialized regulator: core version 0.5 NET: Registered protocol family 16 Found NAND on CS0 Registering NAND on CS0 Switched to new clocking rate (Crystal/Core/MPU): 26.0/600/224 MHz What do you see? Steve ------------------------------------------------------------------------ ------ Protect Your Site and Customers from Malware Attacks Learn about various malware tactics and how to avoid them. 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