Re: [Gumstix-users] gumstix-users Digest, Vol 45, Issue 118

[Sean M. <sea...@gm...>]

> Sean Matthews wrote:
>>>
>>> Sean Matthews wrote:
>>>>
>>>> I've been trying to output some PWM signals using GPTIMER8 through
>>>> GPTIMER12. However, I've found that GPTIMER2 through GPTIMER12 are not
>>>> enabled on startup. One suspicious thing I noticed at flash
>>>> installation is that several patches could not be retrieved from git.
>>>> Is there a specific image I should be using? Can I enable these timers
>>>> by writing to a specific register with devmem2?
>>>>
>>> Yes.  Here's a script that outputs a PWM signal using GPTIMER8:
>>>
>>> #!/bin/bash
>>> # for omap 35xx, setup pwm associated with general purpose timer 8 for
>>> # a frequency of 50hz, 1500us pulse width, then vary pulse width.
>>> # On the overo summit board 40 pin
>>> # header, the output can be observed on pin 29 (GPIO147_PWM8)
>>> devmem2 0x4903e024 w 0x00000000 # set gtp8_TCLR, stop the timer
>>> devmem2 0x48002178 w 0x01020102 # set mux for gpt8_pwm_evt
>>> devmem2 0x4903e02c w 0xfffc08F0 # set value for gpt8_TLDR, timer load
>>> (20ms period)
>>> devmem2 0x4903e038 w 0xfffC551c # set value for gpt8_TMAR, timer match
>>> (1500us pulse width)
>>> devmem2 0x4903e028 w 0xffffffff # set value for gpt8_TCRR, timercounter
>>> devmem2 0x4903e024 w 0x00001843 # set gtp8_TCLR, start the timer
>>> sleep 3
>>> devmem2 0x4903e038 w 0xfffC36a4 # set value for gpt8_TMAR, timer match
>>> 900us)
>>> sleep 3
>>> devmem2 0x4903e038 w 0xfffC7394 # set value for gpt8_TMAR, timer match
>>> (2100us)
>>> sleep 3
>>> devmem2 0x4903e038 w 0xfffC551c # set value for gpt8_TMAR, timer match
>>> (1500us)
>>
>> So my problem is not that I don't know how to use the PWM signals. The
>> problem is that these timers are not even enabled. Writing to any of
>> these registers except for the MUX produces a bus error. The same goes
>> for GPTIMER2-12. I get this problem using the most recent pre-built
>> images. However, when I boot the filesystem that came with the Overo
>> Fire on-board storage, the PWM works fine (with these register writing
>> commands). What do you suppose is the root cause? More importantly,
>> what's the solution?
>>
> See http://old.nabble.com/devmem2-issues-with-overo-kernel-td27077977.html for a complete >description of the root cause and a work around.  In summary, its a kernel issue regarding config >parameter ARCH_HAS_HOLES_MEMORYMODEL.

I changed this parameter in the Kconfig file under the overo-oe/tmp/
... /arm/arch/ directory and did a forced uImage build with bitbake.
However, the image still does not work. Do I need to change a
different Kconfig? Rebuild something in addition to uImage? Change the
root fs?