For the P18F targets, executing SUBFSR or ADDFSR after accessing the POSTINC or POSTDEC register of the same type ignores the "pending update" value to the respective FSR register.
So for example, executing this sequence:
movwf POSTINC1
addfsr 1,1
you would end up with FSR1 being one less than the expected value.
FWIW, inserting an access to INDF1 in this sequence works around the problem:
movwf POSTINC1
movwf INDF1
addfsr 1,1
since then the write to INDF1 applies the "pending update".
I attached a proposed fix including two regression tests. They only test { POSTINC1, addfsr} and { POSTINC1, subfsr } though (should be good enough?).
Anonymous
Patch accepted as is in SVN 2276