The gem5-STNoC model available here (https://sourceforge.net/projects/gem5-stnoc) in alpha version is adapted from the gem5 Garnet Fixed Pipeline as a cycle-approximate NoC model based on STMicroelectronics STNoC backbone specifications. It supports several mechanisms implemented at the STNoC Network Interface, such as NoC Firewall and preliminary Memory Interleaving. The model is freeware covered by standard gem5 license. Development has been partly supported by EU-ICT projects DREAMS and TRESCCA.

Features

  • Network-on-Chip (NoC) technology
  • STMicroelectronics STNoC
  • NoC Firewall (segment-level memory protection)
  • Memory Interleaving
  • Real-Time Network Extensions
  • Network Interface and Router QoS Extensions
  • Design Space Exploration
  • gem5 Simulator

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Registered

2015-11-04