If you want the whole thing to work at 32k then
FEXOSC=LP
If you just want to do timing then hook up your TIMER1 to SOCS
it involves setting some registers (I do it the hard way just to be safe)
t1con=b'10111101' 'timer1 8:1
intcon.6=1 'peripheral interrupt enable
pie1.0=1 'timer1 overflow interrupt enable
t1gcon.7=0 'timer1 runs continuously.
I find this is good for low power work as you can put the chip into SLEEP mode and TIMER1 still runs and will give an interrupt when it overflows.
I am finding that TIMER0 is actually better on these more modern chips ( better range of pre/post scalers).
If your crystal is not working the chip has a failsafe oscillator running at 1 MHz.
Well that's what I've found (your mileage may vary).
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Yes, I just want the whole thing to work at 32K. Seems simple enough.
The first thing I tried was #config rstosc=ext1x, fextosc=lp
It didn't make any difference.
Here is my actual full test program
#optionExplicit#chip16F18313,.032768' 32K crystal on ra4-ra5#config rstosc=ext1x, fextosc=lpdir ra1 out 'led'testclockbyseeinghowmanyinstructionsitcanexecuteinaseconddimnnaswordra1=1do;flashledfornn=1to3000:next;loopshouldtakeabout16clockcycles/nnra1=0;=48000ticks=changeaboutevery1.5seconds.fornn=1to3000:next;testingshowsledblinkingtoorapidlytora1=1;tell,sorunningmuchfasterthan32Kloop
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Excellent. I spotted the extra code last week. For the moment add your code. I need the compiler to expose whether the cpmpiler has selected the internal osc v external osc.
But, well done!
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If you want the whole thing to work at 32k then
FEXOSC=LP
If you just want to do timing then hook up your TIMER1 to SOCS
it involves setting some registers (I do it the hard way just to be safe)
t1con=b'10111101' 'timer1 8:1
intcon.6=1 'peripheral interrupt enable
pie1.0=1 'timer1 overflow interrupt enable
t1gcon.7=0 'timer1 runs continuously.
I find this is good for low power work as you can put the chip into SLEEP mode and TIMER1 still runs and will give an interrupt when it overflows.
I am finding that TIMER0 is actually better on these more modern chips ( better range of pre/post scalers).
If your crystal is not working the chip has a failsafe oscillator running at 1 MHz.
Well that's what I've found (your mileage may vary).
Hi David,
Yes, I just want the whole thing to work at 32K. Seems simple enough.
The first thing I tried was #config rstosc=ext1x, fextosc=lp
It didn't make any difference.
Here is my actual full test program
I think you have to set
DIR porta.4 IN
DIR porta.5 IN
David-
I just tried that and it didn't make any difference.
Are you sure yours is actually running code at 32K?
edit:
Sorry David, I see now you explained this earlier. I must be getting senile in my old age.
Last edit: Jim giordano 2019-11-25
Okay, got it to work.
The problem is obvious from the .asm file produced. It says-
despite my config line=
Unless there is some entry one can put in the config line to force the correct osccon that I haven't run across yet.
So I forced it after the startup by adding the code-
which made it run correctly.
NOTE: This is exactly what David said https://sourceforge.net/p/gcbasic/discussion/579126/thread/346d9e87a7/#4629 on 2019-10-19 !!!
and what Evan hinted at here https://sourceforge.net/p/gcbasic/discussion/579126/thread/346d9e87a7/#dba2
It just didn't sink in.
So, is there going to be some command for the config line to make this work properly without the extra clock switch?
Last edit: Jim giordano 2019-11-25
Excellent. I spotted the extra code last week. For the moment add your code. I need the compiler to expose whether the cpmpiler has selected the internal osc v external osc.
But, well done!