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Setup HW UART port in PIC 18F47Q43

ikonsgr74
2025-08-08
24 hours ago
<< < 1 2 (Page 2 of 2)
  • Anobium

    Anobium - 6 days ago

    I have also tested EE writes and read. They are correct. I used C:\GCstudio\gcbasic\demos\Vendor_Boards\Great_Cow_Basic_Demo_Board\18f26q43_chiprange_demonstrations\160_showing_eeprom_data_to_serial_terminal.gcb

    No issues. The issue when we were testing ( see above ) is likely to be caused by the serial USART library not working as expected.

     
  • ikonsgr74

    ikonsgr74 - 6 days ago

    Ok, now it seems that both test codes work: https://www.dropbox.com/scl/fi/dvfyeknzz11cjvw33xx3w/uart_test.jpg?rlkey=473iiv1tdug9kgjnrl6nh5gvw&dl=0

    This is what i get in windows communication program when i power on Amsrtad CPC with the PIC board connected, so i suppose it's ok.
    But when i'm trying my code (with the same uart settings) i still don't get a response... Perhaps there is a problem with the CLC definitions, this is what i used for Q43:

    CLCSELECT = 0x06
    clcnGLS0  = 0x02
    clcnGLS1  = 0x48
    clcnGLS2  = 0x02
    clcnGLS3  = 0x24
    clcnSEL0  = 0x26
    clcnSEL1  = 0x03
    clcnSEL2  = 0x05
    clcnSEL3  = 0x07
    clcnPOL   = 0x0A
    clcnCON   = 0x80
    
    
    // CLC6  M1+IORQ
    CLCSELECT = 0x05
    clcnGLS0  = 0x01
    clcnGLS1  = 0x01
    clcnGLS2  = 0x08
    clcnGLS3  = 0x08
    clcnSEL0  = 0x00
    clcnSEL1  = 0x02
    clcnSEL2  = 0x00
    clcnSEL3  = 0x00
    clcnPOL   = 0x00
    clcnCON   = 0x82
    
    
    CLCSELECT = 0x02
        CLCNPOL = 0x00;       CLCL FOR ROM  READ ENABLE
        ;CLCNSEL0 = 0x07      RAM READ
        CLCNSEL0 = 0x01;      ROM ENABLE (ROM READ)
        CLCNSEL1 = 0x03;
        CLCNSEL2 = 0x03;
        CLCNSEL3 = 0x03;
        CLCNGLS0 = 0x01;
        CLCNGLS1 = 0x08;
        CLCNGLS2 = 0x20;
        CLCNGLS3 = 0x80;
        CLCNCON = 0x02;
    
    ;       CLC FOR ENABLE PIC
    CLCSELECT = 0x03
        CLCNPOL = 0x00;
        CLCNSEL0 = 0x21;
        CLCNSEL1 = 0x22;
        CLCNSEL2 = 0x25;
        CLCNSEL3 = 0x23;
        CLCNGLS0 = 0x01;
        CLCNGLS1 = 0x04;
        CLCNGLS2 = 0x10;
        CLCNGLS3 = 0x40;
        CLCNCON = 0x02;
    
    
       ;CLC FOR SERIAL I/O ENABLE
    CLCSELECT = 0x00
    CLCNGLS0  = 0x02
    CLCNGLS1  = 0x08
    CLCNGLS2  = 0x10
    CLCNGLS3  = 0x40
    CLCNSEL0  = 0x26
    CLCNSEL1  = 0x03
    CLCNSEL2  = 0x04
    CLCNSEL3  = 0x06
    CLCNPOL   = 0x00
    CLCNCON   = 0x82
    
    
    ;CLC FOR SELECT ROM:OUT &DF00,X
    CLCSELECT = 0x01
    CLCNSEL0  = 0x00
    CLCNSEL1  = 0x02
    CLCNSEL2  = 0x03
    CLCNSEL3  = 0x05
    CLCNGLS0  = 0x01
    CLCNGLS1  = 0x08
    CLCNGLS2  = 0x20
    CLCNGLS3  = 0x40
    CLCNPOL   = 0x00
        if disable_board=100 then
         CLCNCON = 0x02;
        else
          CLCNCON = 0x82;
        end if
    
    
        CLCSELECT = 0x04
        CLCNPOL = 0x00;       CLC FOR FDC ENABLE
        CLCNSEL0 = 0x00;
        CLCNSEL1 = 0x02;
        CLCNSEL2 = 0x04;
        CLCNSEL3 = 0x06;
        CLCNGLS0 = 0x01;
        CLCNGLS1 = 0x08;
        CLCNGLS2 = 0x10;
        CLCNGLS3 = 0x80;
        CLCNCON = 0x82; 
    

    And these were the original CLC definitions for Q10 that work:

    CLC7GLS0  = 0x02
    CLC7GLS1  = 0x48
    CLC7GLS2  = 0x02
    CLC7GLS3  = 0x24
    CLC7SEL0  = 0x26
    CLC7SEL1  = 0x03
    CLC7SEL2  = 0x05
    CLC7SEL3  = 0x07
    CLC7POL   = 0x0A
    CLC7CON   = 0x80
    
    
    // CLC6  M1+IORQ
    CLC6GLS0  = 0x01
    CLC6GLS1  = 0x01
    CLC6GLS2  = 0x08
    CLC6GLS3  = 0x08
    CLC6SEL0  = 0x00
    CLC6SEL1  = 0x02
    CLC6SEL2  = 0x00
    CLC6SEL3  = 0x00
    CLC6POL   = 0x00
    CLC6CON   = 0x82
    
    
    
        CLC3POL = 0x00;       CLCL FOR ROM  READ ENABLE
        ;CLC3SEL0 = 0x07      RAM READ
        CLC3SEL0 = 0x01;      ROM ENABLE (ROM READ)
        CLC3SEL1 = 0x03;
        CLC3SEL2 = 0x03;
        CLC3SEL3 = 0x03;
        CLC3GLS0 = 0x01;
        CLC3GLS1 = 0x08;
        CLC3GLS2 = 0x20;
        CLC3GLS3 = 0x80;
        CLC3CON = 0x02;
    
    ;       CLC FOR ENABLE PIC
        CLC4POL = 0x00;
        CLC4SEL0 = 0x21;
        CLC4SEL1 = 0x22;
        CLC4SEL2 = 0x25;
        CLC4SEL3 = 0x23;
        CLC4GLS0 = 0x01;
        CLC4GLS1 = 0x04;
        CLC4GLS2 = 0x10;
        CLC4GLS3 = 0x40;
        CLC4CON = 0x02;
    
    
       ;CLC FOR SERIAL I/O ENABLE
    
    CLC1GLS0  = 0x02
    CLC1GLS1  = 0x08
    CLC1GLS2  = 0x10
    CLC1GLS3  = 0x40
    CLC1SEL0  = 0x26
    CLC1SEL1  = 0x03
    CLC1SEL2  = 0x04
    CLC1SEL3  = 0x06
    CLC1POL   = 0x00
    CLC1CON   = 0x82
    
    
    ;CLC FOR SELECT ROM:OUT &DF00,X
    CLC2SEL0  = 0x00
    CLC2SEL1  = 0x02
    CLC2SEL2  = 0x03
    CLC2SEL3  = 0x05
    CLC2GLS0  = 0x01
    CLC2GLS1  = 0x08
    CLC2GLS2  = 0x20
    CLC2GLS3  = 0x40
    CLC2POL   = 0x00
        if disable_board=100 then
         CLC2CON = 0x02;
        else
          CLC2CON = 0x82;
        end if
    
    
        CLC5POL = 0x00;       CLC FOR FDC ENABLE
        CLC5SEL0 = 0x00;
        CLC5SEL1 = 0x02;
        CLC5SEL2 = 0x04;
        CLC5SEL3 = 0x06;
        CLC5GLS0 = 0x01;
        CLC5GLS1 = 0x08;
        CLC5GLS2 = 0x10;
        CLC5GLS3 = 0x80;
        CLC5CON = 0x82;    
    

    It seems like the CLC that also control the uart port (using IN/OUT commands at specific addresses) doesn't work at all.... Any ideas?

     
  • ikonsgr74

    ikonsgr74 - 6 days ago

    Ok, i think i got it.... Q43 uses complete different codes for declaring CLC outputs as inputs to other clc, for example setting clc1 out, as input to another clc with Q10, code is 0x21 (CLC1SEL=0x21) where for Q43 is 0x33 (CLCNSEL1=0X33), so i had to change such codes in clc declarations too! First tests seem promising, for the first time board worked on Amstrad CPC using a PIC 18F47Q43! @evanvennn thanks again for the help! :-)

     

    Last edit: ikonsgr74 6 days ago
  • Anobium

    Anobium - 6 days ago

    Can I check. The USART is working at expected? and, you are now using the new usart
    h?

     
  • ikonsgr74

    ikonsgr74 - 6 days ago

    yes i'm using the new usart.h. serial port which seems to work ok, at least all direct I/O with uart works ok. I still have problems connecting with a usb host module though, but most probable this doesn't have to do with the uart function.

     
  • Anobium

    Anobium - 6 days ago

    USART - great news.


    To resolve CLC when GCBASIC with PIC , use the MPLAB Code Configurator (MCC) is a great for setting up peripherals like the Configurable Logic Cell (CLC) and USART. Here’s a quick summary and how you can use MCC’s generated C code in GCBASIC projects.

    What is MCC?

    MCC is Microchip’s free tool for configuring peripherals on PIC devices. It comes as a standalone application:
    - Graphical Interface: Easily configure USART, CLC, ADC, PWM, etc., without diving into datasheets.
    - C Code Generation: Produces clean C code for peripheral initialization and pin setups (e.g., PPS for USART).
    - Validation: Checks for pin conflicts, valid baud rates, and resource compatibility.
    - Support: Works with 8/16/32-bit MCUs, using MCC Melody (modern devices), MCC Classic (legacy), or MPLAB Harmony (32-bit).
    - Standalone Option: No need for MPLAB X—perfect for lightweight workflows.

    Using MCC with GCBASIC

    MCC generates C code that you can open and extract register settings from to use directly in GCBASIC. This is super handy for peripherals like CLC (for logic gates/latches) or USART (for serial comms). Here’s how:

    1. Configure in MCC:
    2. Open MCC (standalone or in MPLAB X).
    3. Select your MCU (e.g., PIC18F27Q43).
    4. Set up peripherals (e.g., USART2 at 115200 baud, CLC for signal modulation) and PPS (e.g., RB2 for TX2, RB1 for RX2).
    5. Generate code to get .c and .h files.

    6. Extract Register Settings:

    7. Open the generated files (e.g., uart2.c for USART, clc1.c for CLC).
    8. Look for register assignments, like:
    // USART2 example
    U2CON0 = 0x80; // Enable UART, TX
    U2BRG = 0x36; // Baud rate for 115200
    RB2PPS = 0x23; // TX2 on RB2
    U2RXPPS = 0x09; // RX2 on RB1
    // CLC example
    CLC1CON = 0x82; // Enable CLC, D Flip-Flop mode
    CLC1SEL0 = 0x10; // Input source (e.g., NCO)
    
    1. Add to GCBASIC:
    2. Copy these into your GCBASIC program, e.g., in an InitPPS sub:
     Sub InitPPS
       UNLOCKPPS
       U2CON0 = 0x80
       U2BRG = 0x36
       RB2PPS = 0x23
       U2RXPPS = 0x09
       CLC1CON = 0x82
       CLC1SEL0 = 0x10
       LOCKPPS
     End Sub
    
    1. Validation Benefits:
    2. MCC ensures no pin conflicts or invalid settings (e.g., correct baud rate for USART2).
    3. Combining CLC and USART setups (like in ComplexTest.gcb) is validated for compatibility, saving debugging time.

    Why Use MCC with GCBASIC?

    • Saves Time: No manual register calculations.
    • Reliable: MCC validates configs, reducing errors.
    • Flexible: Use generated code with GCBASIC’s high-level serial functions for projects like buffered USART or CLC-based logic.

    Where to Get MCC

    • Standalone MCC: Download from www.microchip.com (Development Tools > Software > MPLAB Code Configurator) or gallery.microchip.com (e.g., v5.6.2 for Windows/macOS/Linux).
    • MPLAB X Plugin: Install via MPLAB X’s Plugin Manager.
    • Docs: Check MCC User’s Guide or app notes (e.g., TB3133 for CLC) on Microchip’s site.

    MCC can generate and validate USART/CLC setups, making your GCBASIC code more robust.

     
  • ikonsgr74

    ikonsgr74 - 1 day ago

    I used a lot MCC in the past, to setup CLC's for my project, but then i start using CLCdesigner ,which is much easier and faster tool.
    Anyway, i noticed something strange in the USART2 example you give, serial port speed for 115200 is set by a single register:
    U2BRG = 0x36; // Baud rate for 115200
    But when i set deafult usart2 speed @ 115200 in GCB code ( #define USART2_BAUD_RATE 115200) the asm code for INITUSART routine give this:

    INITUSART
    ;Set the default value for USART handler - required when more than one USART
    ;comport = SCRIPT_DEFAULT_COMPORT
        movlw   1
        movwf   COMPORT,ACCESS
    ;PIC USART 2 Init
    ;U2BRGH=SPBRGH_TEMP2
        banksel U2BRGH
        clrf    U2BRGH,BANKED
    ;U2BRGL=SPBRGL_TEMP2
        movlw   137
        movwf   U2BRGL,BANKED
    ;U2BRGS = BRGS2_SCRIPT
        bsf U2CON0,U2BRGS,BANKED
    ;ON_U2CON1=1
        bsf U2CON1,ON_U2CON1,BANKED
    ;U2TXEN=1
        bsf U2CON0,U2TXEN,BANKED
    ;U2RXEN=1
        bsf U2CON0,U2RXEN,BANKED
        banksel 0
        return
    

    As you can clearly see, usart port speed for 115200 is made by setting U2BRGH=0 and U2BRGL=137 . I suppose U2BRGL and U2BRG are pointing to the same low byte of U2BRG register, but for the same speed (115200), your USART2 example from MCC , uses a completely different value (0x36) compared to the value shown in asm code (137=0x89).
    Does this mean that GCB compiler doesn't set the correct U2BRG values for setting various usart speeds properly?
    Also, with PIC18F47Q10 i use UNLOCKPPS/LOCKPPS nesting only for PPS , TX/RX registers and CLCOUT pins in INITPPS routine:

     Sub InitPPS     
      UNLOCKPPS
    RB3PPS = 0x003    'CLC3OUT > RB3
    RB0PPS = 0x004    'CLC4OUT > RB0
    RB6PPS = 0x007    // CLC7OUT
    
    CLCIN0PPS = 0x16;   //RC6->CLC4:CLCIN0;  IORQ
    CLCIN1PPS = 0x17;   //RC7->CLC4:CLCIN1;  ROMEN
    CLCIN2PPS = 0x0D    'RB5 > CLCIN2        M1
    CLCIN3PPS = 0x0F    'RB7 > CLCIN3        A15  RB6 > CLCIN3        A14
    CLCIN4PPS = 0x12;   //RC2->CLC4:CLCIN4;  A10
    CLCIN5PPS = 0x15;   //RC5->CLC4:CLCIN5;  A13
    CLCIN6PPS = 0x0C;   //RB4->CLC1:CLCIN6;  GOES TO A.5 (FOR FDC ENABLE)
    CLCIN7PPS = 0x1E    // RD6 Data bit 6
    
      RB2PPS = 0x0023    // TX2 > RB2
      U2RXPPS = 0x0009    // RB1 > RX2
        LOCKPPS
        End Sub
    

    I set all other CLC and usart speed registers directly without using UNLOCKPPS/LOCKPPS and never had any problems.
    You think that PIC18F47Q43 needs nesting with UNLOCKPPS/LOCKPPS for these too?

     

    Last edit: ikonsgr74 1 day ago
  • Anobium

    Anobium - 24 hours ago

    Ignore the USART setup. You know GCBASIC sets this correctly. Unless you config the whole chip in MCC exactly the same as GCBASIC you will run into issues with respect to baud rate registers.

     
  • Anobium

    Anobium - 24 hours ago

    There is no real need for PPS lock and unlock unless there is a risk that your program changes these by accident, which is should not.

     
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