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[Gc-linux-cvs] linux/arch/ppc/boot/common util.S,1.6,1.7
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From: <aot...@us...> - 2005-06-23 20:03:01
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Update of /cvsroot/gc-linux/linux/arch/ppc/boot/common In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv25722/arch/ppc/boot/common Modified Files: util.S Log Message: Merge 2.6.12 Index: util.S =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/ppc/boot/common/util.S,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- util.S 4 Jan 2005 21:39:01 -0000 1.6 +++ util.S 23 Jun 2005 20:02:14 -0000 1.7 @@ -62,8 +62,8 @@ clrlwi r10, r10, 3 /* virt to phys in our current address space */ /* this will disable the MMU and jump to 2: */ - mtspr SRR1, r11 - mtspr SRR0, r10 + mtspr SPRN_SRR1, r11 + mtspr SPRN_SRR0, r10 sync rfi 2: @@ -74,23 +74,23 @@ /* Clear BATs */ li r8,0 - mtspr DBAT0U,r8 - mtspr DBAT0L,r8 - mtspr DBAT1U,r8 - mtspr DBAT1L,r8 - mtspr DBAT2U,r8 - mtspr DBAT2L,r8 - mtspr DBAT3U,r8 - mtspr DBAT3L,r8 + mtspr SPRN_DBAT0U,r8 + mtspr SPRN_DBAT0L,r8 + mtspr SPRN_DBAT1U,r8 + mtspr SPRN_DBAT1L,r8 + mtspr SPRN_DBAT2U,r8 + mtspr SPRN_DBAT2L,r8 + mtspr SPRN_DBAT3U,r8 + mtspr SPRN_DBAT3L,r8 .clearbats_601: - mtspr IBAT0U,r8 - mtspr IBAT0L,r8 - mtspr IBAT1U,r8 - mtspr IBAT1L,r8 - mtspr IBAT2U,r8 - mtspr IBAT2L,r8 - mtspr IBAT3U,r8 - mtspr IBAT3L,r8 + mtspr SPRN_IBAT0U,r8 + mtspr SPRN_IBAT0L,r8 + mtspr SPRN_IBAT1U,r8 + mtspr SPRN_IBAT1L,r8 + mtspr SPRN_IBAT2U,r8 + mtspr SPRN_IBAT2L,r8 + mtspr SPRN_IBAT3U,r8 + mtspr SPRN_IBAT3L,r8 isync sync sync @@ -111,14 +111,14 @@ /* Enable, invalidate and then disable the L1 icache/dcache. */ li r8,0 ori r8,r8,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI) - mfspr r11,HID0 + mfspr r11,SPRN_HID0 or r11,r11,r8 andc r10,r11,r8 isync - mtspr HID0,r8 + mtspr SPRN_HID0,r8 sync isync - mtspr HID0,r10 + mtspr SPRN_HID0,r10 sync isync blr @@ -134,17 +134,17 @@ /* Invalidate/disable L2 cache */ sync isync - mfspr r8,L2CR + mfspr r8,SPRN_L2CR rlwinm r8,r8,0,1,31 oris r8,r8,L2CR_L2I@h sync isync - mtspr L2CR,r8 + mtspr SPRN_L2CR,r8 sync isync /* Wait for the invalidation to complete */ - mfspr r8,PVR + mfspr r8,SPRN_PVR srwi r8,r8,16 cmplwi cr0,r8,0x8000 /* 7450 */ cmplwi cr1,r8,0x8001 /* 7455 */ @@ -153,19 +153,19 @@ cror 4*cr0+eq,4*cr0+eq,4*cr2+eq bne 2f -1: mfspr r8,L2CR /* On 745x, poll L2I bit (bit 10) */ +1: mfspr r8,SPRN_L2CR /* On 745x, poll L2I bit (bit 10) */ rlwinm. r9,r8,0,10,10 bne 1b b 3f -2: mfspr r8,L2CR /* On 75x & 74[01]0, poll L2IP bit (bit 31) */ +2: mfspr r8,SPRN_L2CR /* On 75x & 74[01]0, poll L2IP bit (bit 31) */ rlwinm. r9,r8,0,31,31 bne 2b 3: rlwinm r8,r8,0,11,9 /* Turn off L2I bit */ sync isync - mtspr L2CR,r8 + mtspr SPRN_L2CR,r8 sync isync blr @@ -175,24 +175,24 @@ /* Invalidate/disable L3 cache */ sync isync - mfspr r8,L3CR + mfspr r8,SPRN_L3CR rlwinm r8,r8,0,1,31 ori r8,r8,L3CR_L3I@l sync isync - mtspr L3CR,r8 + mtspr SPRN_L3CR,r8 sync isync /* Wait for the invalidation to complete */ -1: mfspr r8,L3CR +1: mfspr r8,SPRN_L3CR rlwinm. r9,r8,0,21,21 bne 1b rlwinm r8,r8,0,22,20 /* Turn off L3I bit */ sync isync - mtspr L3CR,r8 + mtspr SPRN_L3CR,r8 sync isync blr @@ -217,7 +217,7 @@ */ .globl udelay udelay: - mfspr r4,PVR + mfspr r4,SPRN_PVR srwi r4,r4,16 cmpwi 0,r4,1 /* 601 ? */ bne .udelay_not_601 @@ -267,11 +267,11 @@ #ifdef CONFIG_8xx lis r3, IDC_INVALL@h - mtspr IC_CST, r3 + mtspr SPRN_IC_CST, r3 lis r3, IDC_ENABLE@h - mtspr IC_CST, r3 + mtspr SPRN_IC_CST, r3 lis r3, IDC_DISABLE@h - mtspr DC_CST, r3 + mtspr SPRN_DC_CST, r3 #elif CONFIG_4xx lis r3,start@h # r9 = &_start lis r4,_etext@ha @@ -285,14 +285,14 @@ /* Enable, invalidate and then disable the L1 icache/dcache. */ li r3,0 ori r3,r3,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI) - mfspr r4,HID0 + mfspr r4,SPRN_HID0 or r5,r4,r3 isync - mtspr HID0,r5 + mtspr SPRN_HID0,r5 sync isync ori r5,r4,HID0_ICE /* Enable cache */ - mtspr HID0,r5 + mtspr SPRN_HID0,r5 sync isync #endif |
