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[Gc-linux-cvs] htdocs/xml/en news.xml,1.8,1.9 yagcd.xml,1.4,1.5
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From: <mi...@pr...> - 2004-01-31 03:17:00
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Update of /cvsroot/gc-linux/htdocs/xml/en In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv14376/xml/en Modified Files: news.xml yagcd.xml Log Message: ... Index: news.xml =================================================================== RCS file: /cvsroot/gc-linux/htdocs/xml/en/news.xml,v retrieving revision 1.8 retrieving revision 1.9 diff -u -d -r1.8 -r1.9 --- news.xml 30 Jan 2004 10:49:21 -0000 1.8 +++ news.xml 31 Jan 2004 03:15:20 -0000 1.9 @@ -2,6 +2,11 @@ <?xml-stylesheet href="news.xsl" type="text/xsl"?> <news> <item> + <date>30 January 2004</date> + <title>Preliminary network driver</title> + <text>Busybox is running in the initrd (thanks to hubb), interrupts are stable (mist, ionic et al.) and ionic put together a network driver (based on tmbinc's code) that prints debug messages when the GameCube is pinged. All this code is in the CVS.</text> + </item> + <item> <date>29 January 2004</date> <title>Initrd support</title> <text>The framebuffer colors are okay now (thanks to Costis), and the kernel supports an initial ramdisk (thanks to kirin). (<a href="pic/hellogamecube.jpg">Screenshot</a>)</text> Index: yagcd.xml =================================================================== RCS file: /cvsroot/gc-linux/htdocs/xml/en/yagcd.xml,v retrieving revision 1.4 retrieving revision 1.5 diff -u -d -r1.4 -r1.5 --- yagcd.xml 29 Jan 2004 01:21:13 -0000 1.4 +++ yagcd.xml 31 Jan 2004 03:15:20 -0000 1.5 @@ -9,7 +9,7 @@ <a href="../../down/yet_another_gamecube_doc.pdf.tar.gz">pdf</a> (primary document, recommended for printing)<br /> <hr /> -<small><b>last modified: Wed, 28 Jan 2004 18:35:33 </b></small><br /> +<small><b>last modified: Sat, 31 Jan 2004 02:58:52 </b></small><br /> <h1 align="center">Yet Another Gamecube Documentation<br /> <font size="-1">(but one that's worth printing)</font> </h1> @@ -688,9 +688,9 @@ <tr><td align="center">11</td><td></td></tr> -<tr><td align="center">12</td><td></td></tr> +<tr><td align="center">12</td><td>osc - xtal2</td></tr> -<tr><td align="center">13</td><td></td></tr> +<tr><td align="center">13</td><td>osc - xtal1</td></tr> <tr><td align="center">14</td><td></td></tr> </table> @@ -5954,35 +5954,33 @@ <table border="1" cellspacing="0" cellpadding="3"> <tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>Description</b></td></tr> -<tr><td align="center">31</td><td align="center"></td><td>ERRSTAT - Error Status</td></tr> - -<tr><td align="center">30</td><td align="center"></td><td>ERRLATCH - Error Latch</td></tr> - -<tr><td align="center">28</td><td align="center">s</td><td>Start Button</td></tr> - -<tr><td align="center">27</td><td align="center">y</td><td>Y Button</td></tr> - -<tr><td align="center">26</td><td align="center">x</td><td>X Button</td></tr> - -<tr><td align="center">25</td><td align="center">b</td><td>B Button</td></tr> +<tr><td align="center">31</td><td align="center"></td><td>ERRSTAT - Error Status (*1)</td></tr> -<tr><td align="center">24</td><td align="center">a</td><td>A Button</td></tr> +<tr><td align="center"></td><td align="center"></td><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center">0</td><td>no error on last transfer</td></tr> -<tr><td align="center">21</td><td align="center">L</td><td>L Trigger</td></tr> +<tr><td align="center">1</td><td>error on last transfer</td></tr> +</table> +</td></tr> -<tr><td align="center">20</td><td align="center">R</td><td>R Trigger</td></tr> +<tr><td align="center">30</td><td align="center"></td><td>ERRLATCH - Error Latch (*2)</td></tr> -<tr><td align="center">19</td><td align="center">u</td><td>D-Pad Up</td></tr> +<tr><td align="center"></td><td align="center"></td><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center">0</td><td>no error latched</td></tr> -<tr><td align="center">18</td><td align="center">d</td><td>D-Pad Down</td></tr> +<tr><td align="center">1</td><td>error latched (check SISR)</td></tr> +</table> +</td></tr> -<tr><td align="center">17</td><td align="center">r</td><td>D-Pad Right</td></tr> +<tr><td align="center">24-29</td><td align="center"></td><td>bit 0-5 of input byte 0 (bit 6 and 7 are assumed to be 0)</td></tr> -<tr><td align="center">16</td><td align="center">l</td><td>D-Pad Left</td></tr> +<tr><td align="center">16-23</td><td align="center"></td><td>input byte 1</td></tr> -<tr><td align="center">8-15</td><td align="center">x</td><td>Analog Stick X (8bit signed)</td></tr> +<tr><td align="center">8-15</td><td align="center"></td><td>input byte 2</td></tr> -<tr><td align="center">0-7</td><td align="center">y</td><td>Analog Stick Y (8bit signed)</td></tr> +<tr><td align="center">0-7</td><td align="center"></td><td>input byte 3</td></tr> </table> </td></tr> @@ -5990,6 +5988,15 @@ </table> <tt></tt> <br /> <br /> +(*1) This bit represents the current error status for the last SI polling transfer +on this channel. This register is updated after each polling transfer on this channel.<br /> +(*2) This bit is an error status summary of the SISR error bits for this channel. +If an error has occurred on a past SI transfer (polling or Com transfer), this bit +will be set. To determine the exact error, read the SISR register. This bit is actually +an `or` of the latched error status bits for this channel in the SISR. The bit is +cleared by clearing the appropriate error status bits latched in the SISR. The no +response error indicates that a controller is not present on thischannel.<br /> +<br /> <table> <tr><td><tt></tt> @@ -6032,13 +6039,13 @@ <table border="1" cellspacing="0" cellpadding="3"> <tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>Description</b></td></tr> -<tr><td align="center">24-31</td><td align="center">x</td><td>Analog C Stick X (8bit signed)</td></tr> +<tr><td align="center">24-31</td><td align="center">x</td><td>input byte 4</td></tr> -<tr><td align="center">16-23</td><td align="center">y</td><td>Analog C Stick Y (8bit signed)</td></tr> +<tr><td align="center">16-23</td><td align="center">y</td><td>input byte 5</td></tr> -<tr><td align="center">8-15</td><td align="center">l</td><td>L Trigger Analog (8bit signed)</td></tr> +<tr><td align="center">8-15</td><td align="center">l</td><td>input byte 6</td></tr> -<tr><td align="center">0-7</td><td align="center">r</td><td>R Trigger Analog (8bit signed)</td></tr> +<tr><td align="center">0-7</td><td align="center">r</td><td>input byte 7</td></tr> </table> </td></tr> @@ -6046,33 +6053,19 @@ </table> <tt></tt> <br /> <tt></tt> <br /> -<tt>SIC0INBUFH and SIC0INBUFL are double buffered to prevent inconsistent data -reads due to main </tt> - -<div class="p"><!----></div> -<tt>processor conflicting with incoming serial interface data. To insure data -read from SIC0INBUFH </tt> - -<div class="p"><!----></div> -<tt>and SIC0INFUBL are consistent, a locking mechanism prevents the double buffer -from copying new data </tt> - -<div class="p"><!----></div> -<tt>to these registers. Once SIC0INBUFH is read, both SIC0INBUFH and SIC0INBUFL -are `locked` until </tt> - -<div class="p"><!----></div> -<tt>SIC0INBUFL is read. While the buffers are `locked`, new data is not copied -into the buffers. </tt> - -<div class="p"><!----></div> -<tt>When SIC0INBUFL is read, the buffers become unlocked again.</tt> <br /> +SIC0INBUFH and SIC0INBUFL are double buffered to prevent inconsistent data reads +due to main processor conflicting with incoming serial interface data. To insure +data read from SIC0INBUFH and SIC0INFUBL are consistent, a locking mechanism prevents +the double buffer from copying new data to these registers. Once SIC0INBUFH is read, +both SIC0INBUFH and SIC0INBUFL are `locked` until SIC0INBUFL is read. While the +buffers are `locked`, new data is not copied into the buffers. When SIC0INBUFL is +read, the buffers become unlocked again.<tt></tt> <br /> <br /> <table> <tr><td><tt></tt> <table border="1" cellspacing="0" cellpadding="3"> -<tr><td align="center"><tt>0xCC006430</tt></td><td align="center">4</td><td align="center">r/w</td><td align="center">Joy-channel Control (?) (Calibration gun ?)</td></tr> +<tr><td align="center"><tt>0xCC006430</tt></td><td align="center">4</td><td align="center">r/w</td><td align="center">SIPOLL - SI Poll Register (Joy-channel Control (?) (Calibration gun ?))</td></tr> </table> </td></tr> @@ -6092,7 +6085,23 @@ <table border="1" cellspacing="0" cellpadding="3"> <tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>description</b></td></tr> -<tr><td align="center"></td><td align="center">e</td><td>controller port enable (1 bit per port, 1: enabled)</td></tr> +<tr><td align="center">26-31</td><td align="center"></td><td>unused/reserved</td></tr> + +<tr><td align="center">16-25</td><td align="center"></td><td>X - 7 X lines register (*1)</td></tr> + +<tr><td align="center">8-15</td><td align="center"></td><td>Y - y times register (*2)</td></tr> + +<tr><td align="center">4-7</td><td align="center">e</td><td>EN - controller port enable (1 bit per port, 1: enabled) (*3)</td></tr> + +<tr><td align="center">0-3</td><td align="center"></td><td>VBCPY - Vblank copy output channel (1 bit per port) (*4)</td></tr> + +<tr><td align="center"></td><td align="center"></td><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center">0</td><td>copy SICOUTBUF to output buffer after writing</td></tr> + +<tr><td align="center">1</td><td>copy SICOUTBUF to output buffer only on vblank</td></tr> +</table> +</td></tr> </table> </td></tr> @@ -6100,11 +6109,28 @@ </table> <tt></tt> <br /> <br /> +(*1) 7 X lines register: determines the number of horizontal video lines between +polling (the polling interval). The polling begins at vsync. 7 is the minimum setting +(determined by the time required to complete a single polling of the controller). +The maximum setting depends on the current video mode (number of lines per vsync) +and the SIPOLL[Y] register. This register takes affect after vsync.<br /> +(*2) This register determines the number of times the SI controllers are polled +in a single frame. This register takes affect after vsync.<br /> +(*3) Enable polling of channel. When the channel is enabled, polling begins at +the next vblank. When the channel is disabled, polling is stopped immediately after +the current transaction. The status of this bit does not affect communication RAM +transfers on this channel.<br /> +(*4) Normally main processor writes to the SIC0OUTBUF register are copied immediately +to the channel 0 output buffer if a transfer is not currently in progress. When +this bit is asserted, main processor writes to channel 0's SIC0OUTBUF will only +be copied to the outbuffer on vblank. This is used to control the timing of commands +to 3D LCD shutter glasses connected to the VI.<br /> +<br /> <table> <tr><td><tt></tt> <table border="1" cellspacing="0" cellpadding="3"> -<tr><td align="center"><tt>0xCC006434</tt></td><td align="center">4</td><td align="center">r/w</td><td align="center">command</td></tr> +<tr><td align="center"><tt>0xCC006434</tt></td><td align="center">4</td><td align="center">r/w</td><td align="center">SICOMCSR - SI Communication Control Status Register (command)</td></tr> </table> </td></tr> @@ -6124,10 +6150,34 @@ <table border="1" cellspacing="0" cellpadding="3"> <tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>description</b></td></tr> -<tr><td align="center">31</td><td align="center">r</td><td>reset (?)</td></tr> +<tr><td align="center">31</td><td align="center">r</td><td>TCINT - Transfer Complete Interrupt Status</td></tr> + +<tr><td align="center"></td><td align="center"></td><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center">read</td><td align="center">0</td><td>transfer complete interrupt not requested</td></tr> + +<tr><td align="center"></td><td align="center">1</td><td>transfer complete interrupt has been requested</td></tr> + +<tr><td align="center">write</td><td align="center">0</td><td>no effect</td></tr> + +<tr><td align="center"></td><td align="center">1</td><td>clear transfer complete interrupt</td></tr> +</table> +</td></tr> + +<tr><td align="center">30</td><td align="center"></td><td>TCINTMSK - Transfer Complete Interrupt Mask (*1)</td></tr> + +<tr><td align="center"></td><td align="center"></td><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center">0</td><td>interrupt masked</td></tr> + +<tr><td align="center">1</td><td>interrupt enabled</td></tr> +</table> +</td></tr> <tr><td align="center">25-26</td><td align="center">c</td><td>Channel Number</td></tr> +<tr><td align="center"></td><td align="center"></td><td></td></tr> + <tr><td align="center"></td><td align="center">s</td><td>Channel Enable (?)</td></tr> <tr><td align="center">16-22</td><td align="center">m</td><td>number of bytes we want in return, AND 0x7f</td></tr> @@ -6154,11 +6204,23 @@ </table> <tt></tt> <br /> <tt></tt> <br /> +(*1) Interrupt masking prevents the interrupt from being sent to the main processor, +but does not affect the assertion of SICOMCSR[TCINT]<tt></tt> <br /> +<tt></tt> <br /> +When programming the SICOMCSR after a SICOM transfers has already started (e.g., +SICOMCSR[TSTART] is set), the software should read the current value first, +then and/or in the proper data and then write the new data back. The software should +not modify any of the transfer parameters (OUTLNGTH, INLNGTH, CHANNEL) until the +current transfer is complete. This is done to prevent a SICOM transfer already in +progress from being disturbed. When writing the data back, the software should not +set the TSTART bit again unless the current transfer is complete and another transfer +is required.<tt></tt> <br /> +<tt></tt> <br /> <table> <tr><td><tt></tt> <table border="1" cellspacing="0" cellpadding="3"> -<tr><td align="center"><tt>0xCC006438</tt></td><td align="center">4</td><td align="center">r/w</td><td align="center">channel select & status2</td></tr> +<tr><td align="center"><tt>0xCC006438</tt></td><td align="center">4</td><td align="center">r/w</td><td align="center">SISI - SI Status Register (channel select & status2)</td></tr> </table> </td></tr> @@ -6178,15 +6240,45 @@ <table border="1" cellspacing="0" cellpadding="3"> <tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>description</b></td></tr> -<tr><td align="center"></td><td align="center">r</td><td>reset (?)</td></tr> +<tr><td align="center">31</td><td align="center">r</td><td>WR - Write SICnOUTBUF Register (*1)</td></tr> -<tr><td align="center"></td><td align="center">a</td><td>Joy-channel 0 bits (?)</td></tr> +<tr><td align="center"></td><td align="center"></td><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center">read</td><td align="center">0</td><td>buffer copied</td></tr> -<tr><td align="center"></td><td align="center">b</td><td>Joy-channel 1 bits (?)</td></tr> +<tr><td align="center"></td><td align="center">1</td><td>buffer not copied</td></tr> -<tr><td align="center"></td><td align="center">c</td><td>Joy-channel 2 bits (?)</td></tr> +<tr><td align="center">write</td><td align="center">0</td><td>no effect</td></tr> -<tr><td align="center"></td><td align="center">d</td><td>Joy-channel 3 bits (?)</td></tr> +<tr><td align="center"></td><td align="center">1</td><td>copy all buffers</td></tr> +</table> +</td></tr> + +<tr><td align="center">30</td><td align="center"></td><td>reserved/unused</td></tr> + +<tr><td align="center">29</td><td align="center"></td><td></td></tr> + +<tr><td align="center">28</td><td align="center"></td><td></td></tr> + +<tr><td align="center">27</td><td align="center"></td><td></td></tr> + +<tr><td align="center">26</td><td align="center"></td><td></td></tr> + +<tr><td align="center">25</td><td align="center"></td><td></td></tr> + +<tr><td align="center">24</td><td align="center"></td><td></td></tr> + +<tr><td align="center">22-23</td><td align="center"></td><td>reserved/unused</td></tr> + +<tr><td align="center">16-21</td><td align="center">b</td><td>Joy-channel 1 bits</td></tr> + +<tr><td align="center">14-15</td><td align="center"></td><td>reserved/unused</td></tr> + +<tr><td align="center">8-13</td><td align="center">c</td><td>Joy-channel 2 bits</td></tr> + +<tr><td align="center">6-7</td><td align="center"></td><td>reserved/unused</td></tr> + +<tr><td align="center">0-5</td><td align="center">d</td><td>Joy-channel 3 bits</td></tr> </table> </td></tr> @@ -6194,6 +6286,10 @@ </table> <tt></tt> <br /> <tt></tt> <br /> +(*1) Write SICnOUTBUF Register: This register controls and indicates whether the +SICnOUTBUFs have been copied to the double buffered output buffers. This bit is +cleared after the buffers have been copied.<tt></tt> <br /> +<tt></tt> <br /> <tt></tt> <table> <tr><td> @@ -6246,7 +6342,7 @@ <tr><td></td></tr> </table> - +<br /> <div class="p"><!----></div> <h4><a name="tth_sEc5.8.1"> @@ -6255,36 +6351,6 @@ <div class="p"><!----></div> <b>5.8.1.1<a name="tth_sEc5.8.1.1"> -   Init</a> - </b> - -<div class="p"><!----></div> - -<ul> -<li> enable all controllers in 0xcc006430</li> - -<li> set Joy-channel 1-3 Command Register to 0x00400300</li> - -<li> clear SI i/o buffer</li> - -<li> wait until bit 31 of 0xCC006434 is 0, then set it to 1</li> -</ul> - -<div class="p"><!----></div> - -<b>5.8.1.2<a name="tth_sEc5.8.1.2"> -   Read Controller Status</a> - </b> - -<div class="p"><!----></div> - -<ul> -<li> simply read all Joy-channel registers and extract the info you want</li> -</ul> - -<div class="p"><!----></div> - -<b>5.8.1.3<a name="tth_sEc5.8.1.3">   Serial Send Buffer</a>  </b> @@ -6302,7 +6368,7 @@ <div class="p"><!----></div> -<b>5.8.1.4<a name="tth_sEc5.8.1.4"> +<b>5.8.1.2<a name="tth_sEc5.8.1.2">   Serial Get Result</a>  </b> @@ -12113,6 +12179,105 @@ 8.2</a>  standard Controller</h3> <div class="p"><!----></div> + +<b>8.2.0.1<a name="tth_sEc8.2.0.1"> +   Init</a> + </b> + +<div class="p"><!----></div> + +<ul> +<li> enable all controllers in 0xcc006430</li> + +<li> set Joy-channel 1-3 Command Register to 0x00400300</li> + +<li> clear SI i/o buffer</li> + +<li> wait until bit 31 of 0xCC006434 is 0, then set it to 1</li> +</ul> + +<div class="p"><!----></div> + +<b>8.2.0.2<a name="tth_sEc8.2.0.2"> +   Read Controller Status</a> + </b> + +<div class="p"><!----></div> + +<ul> +<li> simply read all Joy-channel registers and extract the info you want</li> +</ul> + +<table> +<tr><td><b>first input word</b></td></tr> + +<tr><td></td></tr> + +<tr><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>Description</b></td></tr> + +<tr><td align="center">31</td><td align="center"></td><td>ERRSTAT - (assumed 0)</td></tr> + +<tr><td align="center">30</td><td align="center"></td><td>ERRLATCH - (assumed 0)</td></tr> + +<tr><td align="center">28</td><td align="center">s</td><td>Start Button</td></tr> + +<tr><td align="center">27</td><td align="center">y</td><td>Y Button</td></tr> + +<tr><td align="center">26</td><td align="center">x</td><td>X Button</td></tr> + +<tr><td align="center">25</td><td align="center">b</td><td>B Button</td></tr> + +<tr><td align="center">24</td><td align="center">a</td><td>A Button</td></tr> + +<tr><td align="center">21</td><td align="center">L</td><td>L Trigger</td></tr> + +<tr><td align="center">20</td><td align="center">R</td><td>R Trigger</td></tr> + +<tr><td align="center">19</td><td align="center">u</td><td>D-Pad Up</td></tr> + +<tr><td align="center">18</td><td align="center">d</td><td>D-Pad Down</td></tr> + +<tr><td align="center">17</td><td align="center">r</td><td>D-Pad Right</td></tr> + +<tr><td align="center">16</td><td align="center">l</td><td>D-Pad Left</td></tr> + +<tr><td align="center">8-15</td><td align="center">x</td><td>Analog Stick X (8bit signed)</td></tr> + +<tr><td align="center">0-7</td><td align="center">y</td><td>Analog Stick Y (8bit signed)</td></tr> +</table> +</td></tr> + +<tr><td></td></tr> +</table> +<br /> +<br /> + +<table> +<tr><td><b>second input word</b></td></tr> + +<tr><td></td></tr> + +<tr><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>Description</b></td></tr> + +<tr><td align="center">24-31</td><td align="center">x</td><td>Analog C Stick X (8bit signed)</td></tr> + +<tr><td align="center">16-23</td><td align="center">y</td><td>Analog C Stick Y (8bit signed)</td></tr> + +<tr><td align="center">8-15</td><td align="center">l</td><td>L Trigger Analog (8bit signed)</td></tr> + +<tr><td align="center">0-7</td><td align="center">r</td><td>R Trigger Analog (8bit signed)</td></tr> +</table> +</td></tr> + +<tr><td></td></tr> +</table> + + +<div class="p"><!----></div> <h4><a name="tth_sEc8.2.1"> 8.2.1</a>  rumble Motor On</h4> @@ -12185,31 +12350,31 @@ <br /> <table border="1" cellspacing="0" cellpadding="3"> -<tr><td align="center"><b>ID</b></td><td><b>Device</b></td></tr> +<tr><td><b>ID</b></td><td><b>Device</b></td></tr> -<tr><td align="center"><tt>0x00000004</tt></td><td>Memory Card 59</td></tr> +<tr><td><tt>0x00000004</tt></td><td>Memory Card 59</td></tr> -<tr><td align="center"><tt>0x00000008</tt></td><td>Memory Card 123</td></tr> +<tr><td><tt>0x00000008</tt></td><td>Memory Card 123</td></tr> -<tr><td align="center"><tt>0x00000010</tt></td><td>Memory Card 251</td></tr> +<tr><td><tt>0x00000010</tt></td><td>Memory Card 251</td></tr> -<tr><td align="center"><tt>0x00000020</tt></td><td>Memory Card 507</td></tr> +<tr><td><tt>0x00000020</tt></td><td>Memory Card 507</td></tr> -<tr><td align="center"><tt>0x00000040</tt></td><td>Memory Card 1019</td></tr> +<tr><td><tt>0x00000040</tt></td><td>Memory Card 1019</td></tr> -<tr><td align="center"><tt>0x00000080</tt></td><td>Memory Card 2043</td></tr> +<tr><td><tt>0x00000080</tt></td><td>Memory Card 2043</td></tr> -<tr><td align="center"><tt>0x01010000</tt></td><td>USB Adapter</td></tr> +<tr><td><tt>0x01010000</tt></td><td>USB Adapter</td></tr> -<tr><td align="center"><tt>0x01020000</tt></td><td>NPDP GDEV</td></tr> +<tr><td><tt>0x01020000</tt></td><td>NPDP GDEV</td></tr> -<tr><td align="center"><tt>0x05070000</tt></td><td>IS Viewer</td></tr> +<tr><td><tt>0x05070000</tt></td><td>IS Viewer</td></tr> -<tr><td align="center"><tt>0x03010000</tt></td><td>Marlin (?)</td></tr> +<tr><td><tt>0x03010000</tt></td><td>Marlin (?)</td></tr> -<tr><td align="center"><tt>0x02020000</tt></td><td>Modem</td></tr> +<tr><td><tt>0x02020000</tt></td><td>Modem</td></tr> -<tr><td align="center"><tt>0x04020200</tt></td><td>Ethernet Adapter</td></tr> +<tr><td><tt>0x04020200</tt></td><td>Ethernet Adapter</td></tr> </table> @@ -16462,6 +16627,10 @@ <tr><td align="center"></td><td align="right">some image format info</td></tr> +<tr><td align="center"><b>Aktnot</b></td><td align="right">http://cube.iu.hio.no/s104086/</td></tr> + +<tr><td align="center"></td><td align="right">additional rtc/ipl pinout info</td></tr> + <tr><td align="center"></td></tr></table> </center> <div class="p"><!----></div> |
