From: <mi...@pr...> - 2004-01-31 02:31:55
|
Update of /cvsroot/gc-linux/htdocs/xml/en In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv16265/xml/en Modified Files: download.xml news.xml yagcd.xml Log Message: ... Index: download.xml =================================================================== RCS file: /cvsroot/gc-linux/htdocs/xml/en/download.xml,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- download.xml 27 Jan 2004 17:52:38 -0000 1.3 +++ download.xml 29 Jan 2004 01:21:11 -0000 1.4 @@ -9,6 +9,11 @@ <p>There is no working Linux for the GameCube yet - but there is the "linuxpreview" application.</p> + <h2>Current kernel</h2> + + <p>This link always points to the latest kernel .DOL. It should at least show the kernel messages on the GameCube screen.</p> + + <p><a href="../down/zImage.dol">zImage.dol</a></p> <h2>Linux prealpha</h2> <p>This Linux 2.6.0 kernel boots up to "Decompressing the kernel...done\nNow booting the kernel", and has screen output. It works on the real GameCube, as well as in the dolwin emulator.</p> Index: news.xml =================================================================== RCS file: /cvsroot/gc-linux/htdocs/xml/en/news.xml,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- news.xml 27 Jan 2004 17:52:38 -0000 1.5 +++ news.xml 29 Jan 2004 01:21:13 -0000 1.6 @@ -2,6 +2,11 @@ <?xml-stylesheet href="news.xsl" type="text/xsl"?> <news> <item> + <date>28 January 2004</date> + <title>Working framebuffer code</title> + <text>The framebuffer code in CVS is now functional. Tux sits on the upper left, and kernel messages are scrolling on the screen. Because of the missing color space conversion, colors are wrong at the moment.</text> + </item> + <item> <date>27 January 2004</date> <title>DOL plugin for IDA</title> <text>Stefan "ionic" Esser contributed a .DOL file format plugin for developers who have a PPC-enabled IDA. (<a href="docs/download.html">Download</a>)</text> Index: yagcd.xml =================================================================== RCS file: /cvsroot/gc-linux/htdocs/xml/en/yagcd.xml,v retrieving revision 1.3 retrieving revision 1.4 diff -u -d -r1.3 -r1.4 --- yagcd.xml 27 Jan 2004 18:00:00 -0000 1.3 +++ yagcd.xml 29 Jan 2004 01:21:13 -0000 1.4 @@ -9,7 +9,7 @@ <a href="../../down/yet_another_gamecube_doc.pdf.tar.gz">pdf</a> (primary document, recommended for printing)<br /> <hr /> -<small><b>last modified: Tue, 27 Jan 2004 14:25:39 </b></small><br /> +<small><b>last modified: Wed, 28 Jan 2004 18:35:33 </b></small><br /> <h1 align="center">Yet Another Gamecube Documentation<br /> <font size="-1">(but one that's worth printing)</font> </h1> @@ -472,7 +472,7 @@ <tr><td align="center">4</td><td>CLK</td></tr> -<tr><td align="center">5</td><td>12V</td></tr> +<tr><td align="center">5</td><td>1.25V</td></tr> <tr><td align="center">6</td><td>DO</td></tr> @@ -762,7 +762,7 @@ <div class="p"><!----></div> <ul> -<li> General purpose registers (r0-r15) +<li> General purpose registers (r0-r31) <div class="p"><!----></div> @@ -774,9 +774,9 @@ <li> r13 global pointer to _SDA_BASE_</li> </ul></li> -<li> Floating point registers (fp0-fp15)</li> +<li> Floating point registers (fp0-fp31)</li> -<li> Segment registers (sr0-sr15)</li> +<li> Segment registers (sr0-sr15) - unused in regular (SDK/DolphinOS) applications</li> <li> Special purpose registers (spr0-spr1023) @@ -4275,6 +4275,25 @@ <br /> <div class="p"><!----></div> + <h4><a name="tth_sEc5.3.1"> +5.3.1</a>  Video Modes</h4> + +<div class="p"><!----></div> + +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><b>TV Norm</b></td><td align="center"></td><td align="center">Columns</td><td align="center">Lines</td></tr> + +<tr><td align="center">NTSC</td><td align="center">60Hz</td><td align="center">640</td><td align="center">480</td></tr> + +<tr><td align="center">PAL</td><td align="center">50Hz</td><td align="center">640</td><td align="center">574</td></tr> + +<tr><td align="center">PAL</td><td align="center">60Hz</td><td align="center">640</td><td align="center">574</td></tr> +</table> +<br /> +<br /> +note: other modes may be possible using VGA output + +<div class="p"><!----></div> <h3><a name="tth_sEc5.4"> 5.4</a>  PI - Processor Interface</h3> @@ -7243,7 +7262,7 @@ <tr><td align="center"><tt>0x32</tt></td><td><tt>0xXX 0xXX 0xXX</tt></td><td>SU_SSIZE1 - texture offset 1</td></tr> -<tr><td align="center"><tt>0x32</tt></td><td></td><td>SU_TSIZE1 -</td></tr> +<tr><td align="center"><tt>0x33</tt></td><td></td><td>SU_TSIZE1 -</td></tr> <tr><td align="center"><tt>0x34</tt></td><td><tt>0xXX 0xXX 0xXX</tt></td><td>SU_SSIZE2 - texture offset 2</td></tr> @@ -7271,27 +7290,41 @@ <tr><td align="center"><tt>0x40</tt></td><td><tt>0x00 0x00 0xXX</tt></td><td>PE_ZMODE_ID set z mode (0x40000017)</td></tr> -<tr><td align="center"><tt>0x41</tt></td><td><tt>00 xx xx</tt></td><td>PE_CMODE0_ID dithering / blend mode blend_mode(0x410004a0)color_update(0x410004a8)alpha_update(0x410004b8)set_dither(0x410004bc)</td></tr> +<tr><td align="center"><tt>0x41</tt></td><td><tt>0x00 0xxx 0xxx</tt></td><td>PE_CMODE0_ID dithering / blend mode blend_mode(0x410004a0)color_update(0x410004a8)alpha_update(0x410004b8)set_dither(0x410004bc)</td></tr> -<tr><td align="center"><tt>0x42</tt></td><td><tt>00 00 00</tt></td><td>PE_CMODE1_ID destination alpha</td></tr> +<tr><td align="center"><tt>0x42</tt></td><td><tt>0x00 0x00 0x00</tt></td><td>PE_CMODE1_ID destination alpha</td></tr> -<tr><td align="center"><tt>0x43</tt></td><td><tt>00 00 xx</tt></td><td>PE_CONTROL_ID comp z location z_comp_loc(0x43000040)pixel_fmt(0x43000041)</td></tr> +<tr><td align="center"><tt>0x43</tt></td><td><tt>0x00 0x00 0xxx</tt></td><td>PE_CONTROL_ID comp z location z_comp_loc(0x43000040)pixel_fmt(0x43000041)</td></tr> <tr><td align="center"><tt>0x44</tt></td><td><tt>0x00 0x00 0x00</tt></td><td>field mask (0x44000003)</td></tr> <tr><td align="center"><tt>0x45</tt></td><td><tt>0x00 0x00 0x02</tt></td><td>draw done (end of list marker) ?</td></tr> +<tr><td align="center"><tt>0x46</tt></td><td></td><td>?</td></tr> + <tr><td align="center"><tt>0x47</tt></td><td><tt>0x00 0x00 0x00</tt></td><td>PE_TOKEN_ID token B (16 bit)</td></tr> <tr><td align="center"><tt>0x48</tt></td><td><tt>0x00 0x00 0x00</tt></td><td>PE_TOKEN_INT_ID token A (16 bit)</td></tr> +<tr><td align="center"><tt>0x49</tt></td><td></td><td>EFB source rectangle top left</td></tr> + +<tr><td align="center"><tt>0x4a</tt></td><td></td><td>EFB source rectangle bottom right</td></tr> + +<tr><td align="center"><tt>0x4b</tt></td><td></td><td>XFB target address</td></tr> + +<tr><td align="center"><tt>0x4c</tt></td><td></td><td>?</td></tr> + +<tr><td align="center"><tt>0x4d</tt></td><td></td><td>stride ?</td></tr> + <tr><td align="center"><tt>0x4e</tt></td><td><tt>0xxx 0xxx 0xxx</tt></td><td>DispCopyYScale</td></tr> -<tr><td align="center"><tt>0x4f</tt></td><td><tt>0x00 0x00 0x00</tt></td><td>PE copy clear AR</td></tr> +<tr><td align="center"><tt>0x4f</tt></td><td><tt>0x00 0xxx 0xyy</tt></td><td>PE copy clear AR - set clear alpha and red components</td></tr> -<tr><td align="center"><tt>0x50</tt></td><td><tt>0x00 0x00 0x00</tt></td><td>PE copy clear GB</td></tr> +<tr><td align="center"><tt>0x50</tt></td><td><tt>0x00 0xxx 0xyy</tt></td><td>PE copy clear GB - green and blue</td></tr> -<tr><td align="center"><tt>0x51</tt></td><td><tt>0x00 0x00 0x00</tt></td><td>PE copy clear Z</td></tr> +<tr><td align="center"><tt>0x51</tt></td><td><tt>0xxx 0xxx 0xxx</tt></td><td>PE copy clear Z - 24-bit Z value</td></tr> + +<tr><td align="center"><tt>0x52</tt></td><td></td><td>pe copy execute?</td></tr> <tr><td align="center"><tt>0x53</tt></td><td></td><td>copy filter</td></tr> @@ -7301,6 +7334,8 @@ <tr><td align="center"><tt>0x56</tt></td><td></td><td>bounding box (0x560003ff)</td></tr> +<tr><td align="center"><tt>0x57</tt></td><td></td><td>?</td></tr> + <tr><td align="center"><tt>0x58</tt></td><td></td><td>? (0x5800000f)</td></tr> <tr><td align="center"><tt>0x59</tt></td><td></td><td>scissor-box offset (0x5902acab)</td></tr> @@ -8022,6 +8057,44 @@ <table> <tr><td> <table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><tt>0x31</tt></td><td align="center">4</td><td align="center">w</td><td align="center">SU_TSIZE0</td></tr> +</table> +</td></tr> + +<tr><td></td></tr> + +<tr><td><tt></tt> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td><tt>31</tt></td><td align="right"><tt>24</tt></td><td><tt>23</tt></td><td align="right"><tt>16</tt></td><td><tt>15</tt></td><td align="right"><tt>8</tt></td><td><tt>7</tt></td><td align="right"><tt>0</tt></td></tr> + +<tr><td></td><td align="right"></td><td></td><td align="right"></td><td></td><td align="right"></td><td></td><td align="right"></td></tr> +</table> +</td></tr> + +<tr><td></td></tr> + +<tr><td><tt></tt> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>description</b></td></tr> + +<tr><td align="center">24</td><td align="center"></td><td>SU_TS1_RID</td></tr> + +<tr><td align="center">17</td><td align="center"></td><td>SU_TS1_WT</td></tr> + +<tr><td align="center">16</td><td align="center"></td><td>SU_TS1_BT</td></tr> + +<tr><td align="center">0</td><td align="center"></td><td>SU_TS1_TSIZE</td></tr> +</table> +</td></tr> + +<tr><td></td></tr> +</table> +<br /> +<br /> + +<table> +<tr><td> +<table border="1" cellspacing="0" cellpadding="3"> <tr><td align="center"><tt>0x40</tt></td><td align="center">4</td><td align="center">w</td><td align="center">PE_ZMODE</td></tr> </table> </td></tr> @@ -8146,7 +8219,7 @@ <table> <tr><td> <table border="1" cellspacing="0" cellpadding="3"> -<tr><td align="center"><tt>0x31</tt></td><td align="center">4</td><td align="center">w</td><td align="center">SU_TSIZE0</td></tr> +<tr><td align="center"><tt>0x47</tt></td><td align="center">4</td><td align="center">w</td><td align="center">PE_TOKEN</td></tr> </table> </td></tr> @@ -8166,13 +8239,43 @@ <table border="1" cellspacing="0" cellpadding="3"> <tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>description</b></td></tr> -<tr><td align="center">24</td><td align="center"></td><td>SU_TS1_RID</td></tr> +<tr><td align="center">24</td><td align="center"></td><td>RID</td></tr> -<tr><td align="center">17</td><td align="center"></td><td>SU_TS1_WT</td></tr> +<tr><td align="center">0</td><td align="center"></td><td>Token</td></tr> +</table> +</td></tr> -<tr><td align="center">16</td><td align="center"></td><td>SU_TS1_BT</td></tr> +<tr><td></td></tr> +</table> +<br /> +<br /> -<tr><td align="center">0</td><td align="center"></td><td>SU_TS1_TSIZE</td></tr> +<table> +<tr><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><tt>0x49</tt></td><td align="center">4</td><td align="center">w</td><td align="center">EFB Address Top Left</td></tr> +</table> +</td></tr> + +<tr><td></td></tr> + +<tr><td><tt></tt> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td><tt>31</tt></td><td align="right"><tt>24</tt></td><td><tt>23</tt></td><td align="right"><tt>16</tt></td><td><tt>15</tt></td><td align="right"><tt>8</tt></td><td><tt>7</tt></td><td align="right"><tt>0</tt></td></tr> + +<tr><td></td><td align="right"></td><td></td><td align="right"></td><td></td><td align="right"></td><td></td><td align="right"></td></tr> +</table> +</td></tr> + +<tr><td></td></tr> + +<tr><td><tt></tt> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>description</b></td></tr> + +<tr><td align="center">10</td><td align="center"></td><td>Y coordinate</td></tr> + +<tr><td align="center">0</td><td align="center"></td><td>X coordinate</td></tr> </table> </td></tr> @@ -8184,7 +8287,7 @@ <table> <tr><td> <table border="1" cellspacing="0" cellpadding="3"> -<tr><td align="center"><tt>0x47</tt></td><td align="center">4</td><td align="center">w</td><td align="center">PE_TOKEN</td></tr> +<tr><td align="center"><tt>0x4a</tt></td><td align="center">4</td><td align="center">w</td><td align="center">EFB Address Bottom Right</td></tr> </table> </td></tr> @@ -8204,9 +8307,43 @@ <table border="1" cellspacing="0" cellpadding="3"> <tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>description</b></td></tr> -<tr><td align="center">24</td><td align="center"></td><td>RID</td></tr> +<tr><td align="center">10</td><td align="center"></td><td>Y coordinate</td></tr> -<tr><td align="center">0</td><td align="center"></td><td>Token</td></tr> +<tr><td align="center">0</td><td align="center"></td><td>X coordinate</td></tr> +</table> +</td></tr> + +<tr><td></td></tr> +</table> +<br /> +<br /> + +<table> +<tr><td> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><tt>0x4b</tt></td><td align="center">4</td><td align="center">w</td><td align="center">XFB Address</td></tr> +</table> +</td></tr> + +<tr><td></td></tr> + +<tr><td><tt></tt> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td><tt>31</tt></td><td align="right"><tt>24</tt></td><td><tt>23</tt></td><td align="right"><tt>16</tt></td><td><tt>15</tt></td><td align="right"><tt>8</tt></td><td><tt>7</tt></td><td align="right"><tt>0</tt></td></tr> + +<tr><td></td><td align="right"></td><td></td><td align="right"></td><td></td><td align="right"></td><td></td><td align="right"></td></tr> +</table> +</td></tr> + +<tr><td></td></tr> + +<tr><td><tt></tt> +<table border="1" cellspacing="0" cellpadding="3"> +<tr><td align="center"><b>bit(s)</b></td><td align="center"></td><td><b>description</b></td></tr> + +<tr><td align="center"></td><td align="center"></td><td></td></tr> + +<tr><td align="center"></td><td align="center"></td><td>physical XFB Address > > 5</td></tr> </table> </td></tr> @@ -10990,7 +11127,8 @@ <tr><td align="center">6-7</td><td align="center"></td><td>unused</td></tr> -<tr><td align="center">0</td><td align="center"></td><td><tt>DUALMTX - base row of the dual transform matrix for regular texture coordinate0</tt></td></tr> +<tr><td align="center">0-5</td><td align="center"></td><td><tt>DUALMTX - base row of the dual transform matrix for regular texture coordinate0 +(63 max, simelar to 0x1018/0x1019)</tt></td></tr> </table> </td></tr> @@ -11060,9 +11198,7 @@ <tr><td align="center"><tt>0x48</tt></td><td>Invalidate Vertex Cache</td></tr> -<tr><td align="center"><tt>0x6.</tt></td><td>SU_ByPassCmd</td></tr> - -<tr><td align="center"><tt>0x61</tt></td><td>Load BP REG</td></tr> +<tr><td align="center"><tt>0x61</tt></td><td>Load BP REG (SU_ByPassCmd)</td></tr> <tr><td align="center"><tt>0x80</tt></td><td>Draw Quads (*)</td></tr> @@ -11173,7 +11309,7 @@ <div class="p"><!----></div> <b>5.11.7.6<a name="tth_sEc5.11.7.6"> -   BP command (Raster State Registers)</a> +   BP command (Bypass Raster State Registers)</a>  </b> <div class="p"><!----></div> @@ -11820,7 +11956,7 @@ PI[5] = 0x100000; <div class="p"><!----></div> -mtwpar(0xC008000); +mtwpar(0xC008000); // GXFIFO physical address <div class="p"><!----></div> mtspr(920, mfspr(920) - 0x40000000); @@ -11854,22 +11990,27 @@  </b> <div class="p"><!----></div> -GX_LOAD_BP_REG(0x4000001f); +#define XY(x, y) (((y) < < 10) - (x)) <div class="p"><!----></div> -GX_LOAD_BP_REG(0x410004bc); +GX_LOAD_BP_REG(0x4000001f); // set z mode <div class="p"><!----></div> -GX_LOAD_BP_REG(0x49000000 - XY(0, 0)); // set source top +GX_LOAD_BP_REG(0x410004bc); // set color mode 0 <div class="p"><!----></div> -GX_LOAD_BP_REG(0x4a000000 - XY(639, 479)); +GX_LOAD_BP_REG(0x49000000 - XY(0, 0)); // set source top left <div class="p"><!----></div> -GX_LOAD_BP_REG(0x4d000028); +GX_LOAD_BP_REG(0x4a000000 - XY(639, 479)); // set source bottom right <div class="p"><!----></div> -GX_LOAD_BP_REG(0x4b000000 - (0xC00000 > > 5)); +GX_LOAD_BP_REG(0x4d000028); // stride? (0x1280> >5) ... 640*2 +; 320*YuYv + +<div class="p"><!----></div> +GX_LOAD_BP_REG(0x4b000000 - (0xC00000 > > 5)); // xfb target +address <div class="p"><!----></div> GX_LOAD_BP_REG(PE_COPY_CLEAR_AR - 0x0000); @@ -11881,7 +12022,7 @@ GX_LOAD_BP_REG(PE_COPY_CLEAR_Z - 0xFFFFFF); <div class="p"><!----></div> -GX_LOAD_BP_REG(0x52004803); +GX_LOAD_BP_REG(0x52004803); // do it (efb copy execution command?) <div class="p"><!----></div> <h4><a name="tth_sEc7.2.5"> |