From: Albert H. <he...@us...> - 2007-11-14 23:09:17
|
Update of /cvsroot/gc-linux/linux/drivers/exi In directory sc8-pr-cvs2.sourceforge.net:/tmp/cvs-serv4431/drivers/exi Modified Files: exi-hw.c exi-hw.h Log Message: Merged 2.6.22. Updated drivers to use in_be* and out_be* instead of read* and write* input/output instructions. Updated DI driver: - do not use debug extensions with unknown drive models - do not load custom firmware on xenogc/duoq - evict alien firmwares and load custom formware on known drive models Index: exi-hw.h =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/exi/exi-hw.h,v retrieving revision 1.7 retrieving revision 1.8 diff -u -d -r1.7 -r1.8 --- exi-hw.h 7 Nov 2005 21:34:17 -0000 1.7 +++ exi-hw.h 14 Nov 2007 23:08:49 -0000 1.8 @@ -2,9 +2,9 @@ * drivers/exi/exi-hw.h * * Nintendo GameCube EXpansion Interface support. Hardware routines. - * Copyright (C) 2004-2005 The GameCube Linux Team + * Copyright (C) 2004-2007 The GameCube Linux Team * Copyright (C) 2004,2005 Todd Jeffreys <to...@vo...> - * Copyright (C) 2005 Albert Herranz + * Copyright (C) 2005,2006,2007 Albert Herranz * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -163,24 +163,24 @@ */ \ if ((mode & EXI_OP_WRITE)) \ _on_write; \ - writel(_val, data_reg); \ + out_be32(data_reg, _val); \ \ /* start transfer */ \ _val = EXI_CR_TSTART | EXI_CR_TLEN(sizeof(_type)) | (mode&0xf); \ - writel(_val, cr_reg); \ + out_be32(cr_reg, _val); \ \ /* wait for transfer completion */ \ - while(readl(cr_reg) & EXI_CR_TSTART) \ + while(in_be32(cr_reg) & EXI_CR_TSTART) \ cpu_relax(); \ \ /* XXX check if we need that on immediate mode */ \ /* assert transfer complete interrupt */ \ spin_lock_irqsave(&exi_channel->io_lock, flags); \ - writel(readl(csr_reg) | EXI_CSR_TCINT, csr_reg); \ + out_be32(csr_reg, in_be32(csr_reg) | EXI_CSR_TCINT); \ spin_unlock_irqrestore(&exi_channel->io_lock, flags); \ \ if ((mode&0xf) != EXI_OP_WRITE) { /* read or read-write */ \ - _val = readl(data_reg); \ + _val = in_be32(data_reg); \ _on_read; \ } \ } Index: exi-hw.c =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/exi/exi-hw.c,v retrieving revision 1.14 retrieving revision 1.15 diff -u -d -r1.14 -r1.15 --- exi-hw.c 18 Feb 2007 22:56:01 -0000 1.14 +++ exi-hw.c 14 Nov 2007 23:08:49 -0000 1.15 @@ -2,9 +2,9 @@ * drivers/exi/exi-hw.c * * Nintendo GameCube EXpansion Interface support. Hardware routines. - * Copyright (C) 2004-2005 The GameCube Linux Team + * Copyright (C) 2004-2007 The GameCube Linux Team * Copyright (C) 2004,2005 Todd Jeffreys <to...@vo...> - * Copyright (C) 2005 Albert Herranz + * Copyright (C) 2005,2006,2007 Albert Herranz * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -190,10 +190,10 @@ * Preserve interrupt masks while setting the CS line bits. */ spin_lock_irqsave(&exi_channel->io_lock, flags); - csr = readl(csr_reg); + csr = in_be32(csr_reg); csr &= (EXI_CSR_EXTINMASK | EXI_CSR_TCINTMASK | EXI_CSR_EXIINTMASK); csr |= ((1<<device) << 7) | (freq << 4); - writel(csr, csr_reg); + out_be32(csr_reg, csr); spin_unlock_irqrestore(&exi_channel->io_lock, flags); } @@ -215,9 +215,9 @@ * Preserve interrupt masks while clearing the CS line bits. */ spin_lock_irqsave(&exi_channel->io_lock, flags); - csr = readl(csr_reg); + csr = in_be32(csr_reg); csr &= (EXI_CSR_EXTINMASK | EXI_CSR_TCINTMASK | EXI_CSR_EXIINTMASK); - writel(csr, csr_reg); + out_be32(csr_reg, csr); spin_unlock_irqrestore(&exi_channel->io_lock, flags); } @@ -290,15 +290,15 @@ } } - writel(val, io_base + EXI_DATA); + out_be32(io_base + EXI_DATA, val); /* enable the Transfer Complete interrupt */ spin_lock_irqsave(&exi_channel->io_lock, flags); - writel(readl(csr_reg) | EXI_CSR_TCINTMASK, csr_reg); + out_be32(csr_reg, in_be32(csr_reg) | EXI_CSR_TCINTMASK); spin_unlock_irqrestore(&exi_channel->io_lock, flags); /* start the transfer */ - writel(EXI_CR_TSTART | EXI_CR_TLEN(len) | (mode&0xf), io_base + EXI_CR); + out_be32(io_base + EXI_CR, EXI_CR_TSTART | EXI_CR_TLEN(len) | (mode&0xf)); } /* @@ -313,7 +313,7 @@ BUG_ON(len < 1 || len > 4); if ((mode&0xf) != EXI_OP_WRITE) { - val = readl(io_base + EXI_DATA); + val = in_be32(io_base + EXI_DATA); switch(len) { case 1: *((u8*)data) = (u8)(val >> 24); @@ -352,19 +352,19 @@ * special hardware, like SD cards. * Indeed, we need all 1s here. */ - writel(~0, io_base + EXI_DATA); + out_be32(io_base + EXI_DATA, ~0); /* setup address and length of transfer */ - writel(data, io_base + EXI_MAR); - writel(len, io_base + EXI_LENGTH); + out_be32(io_base + EXI_MAR, data); + out_be32(io_base + EXI_LENGTH, len); /* enable the Transfer Complete interrupt */ spin_lock_irqsave(&exi_channel->io_lock, flags); - writel(readl(csr_reg) | EXI_CSR_TCINTMASK, csr_reg); + out_be32(csr_reg, in_be32(csr_reg) | EXI_CSR_TCINTMASK); spin_unlock_irqrestore(&exi_channel->io_lock, flags); /* start the transfer */ - writel(EXI_CR_TSTART | EXI_CR_DMA | (mode&0xf), io_base + EXI_CR); + out_be32(io_base + EXI_CR, EXI_CR_TSTART | EXI_CR_DMA | (mode&0xf)); } @@ -379,16 +379,16 @@ /* we don't want TCINTs to disturb us while waiting */ spin_lock_irqsave(&exi_channel->io_lock, flags); - writel(readl(csr_reg) & ~EXI_CSR_TCINTMASK, csr_reg); + out_be32(csr_reg, in_be32(csr_reg) & ~EXI_CSR_TCINTMASK); spin_unlock_irqrestore(&exi_channel->io_lock, flags); /* busy-wait for transfer complete */ - while(readl(cr_reg) & EXI_CR_TSTART) + while(in_be32(cr_reg) & EXI_CR_TSTART) cpu_relax(); /* ack the Transfer Complete interrupt */ spin_lock_irqsave(&exi_channel->io_lock, flags); - writel(readl(csr_reg) | EXI_CSR_TCINT, csr_reg); + out_be32(csr_reg, in_be32(csr_reg) | EXI_CSR_TCINT); spin_unlock_irqrestore(&exi_channel->io_lock, flags); } @@ -1083,7 +1083,7 @@ */ spin_lock_irqsave(&exi_channel->io_lock, flags); - csr = readl(csr_reg); + csr = in_be32(csr_reg); mask = csr & (EXI_CSR_EXTINMASK | EXI_CSR_TCINTMASK | EXI_CSR_EXIINTMASK); status = csr & (mask << 1); @@ -1099,7 +1099,7 @@ exi_channel->csr); /* ack all for this channel */ - writel(csr | status, csr_reg); + out_be32(csr_reg, csr | status); spin_unlock_irqrestore(&exi_channel->io_lock, flags); @@ -1128,18 +1128,18 @@ unsigned long flags; spin_lock_irqsave(&exi_channel->io_lock, flags); - csr = readl(csr_reg); + csr = in_be32(csr_reg); /* ack and enable the associated interrupt */ switch (event_id) { case EXI_EVENT_INSERT: - writel(csr | (EXI_CSR_EXTIN | EXI_CSR_EXTINMASK), csr_reg); + out_be32(csr_reg, csr | (EXI_CSR_EXTIN | EXI_CSR_EXTINMASK)); break; case EXI_EVENT_TC: - //writel(csr | (EXI_CSR_TCINT | EXI_CSR_TCINTMASK), csr_reg); + //out_be32(csr_reg, csr | (EXI_CSR_TCINT | EXI_CSR_TCINTMASK)); break; case EXI_EVENT_IRQ: - writel(csr | (EXI_CSR_EXIINT | EXI_CSR_EXIINTMASK), csr_reg); + out_be32(csr_reg, csr | (EXI_CSR_EXIINT | EXI_CSR_EXIINTMASK)); break; } spin_unlock_irqrestore(&exi_channel->io_lock, flags); @@ -1157,18 +1157,18 @@ unsigned long flags; spin_lock_irqsave(&exi_channel->io_lock, flags); - csr = readl(csr_reg); + csr = in_be32(csr_reg); /* ack and disable the associated interrupt */ switch (event_id) { case EXI_EVENT_INSERT: - writel((csr | EXI_CSR_EXTIN) & ~EXI_CSR_EXTINMASK, csr_reg); + out_be32(csr_reg, (csr | EXI_CSR_EXTIN) & ~EXI_CSR_EXTINMASK); break; case EXI_EVENT_TC: - //writel((csr | EXI_CSR_TCINT) & ~EXI_CSR_TCINTMASK, csr_reg); + //out_be32(csr_reg, (csr | EXI_CSR_TCINT) & ~EXI_CSR_TCINTMASK); break; case EXI_EVENT_IRQ: - writel((csr | EXI_CSR_EXIINT) & ~EXI_CSR_EXIINTMASK, csr_reg); + out_be32(csr_reg, (csr | EXI_CSR_EXIINT) & ~EXI_CSR_EXIINTMASK); break; } spin_unlock_irqrestore(&exi_channel->io_lock, flags); @@ -1251,8 +1251,8 @@ exi_wait_for_transfer_raw(exi_channel); /* ack and mask all interrupts */ - writel(EXI_CSR_TCINT | EXI_CSR_EXIINT | EXI_CSR_EXTIN | csr_mask, - exi_channel->io_base + EXI_CSR); + out_be32(exi_channel->io_base + EXI_CSR, + EXI_CSR_TCINT | EXI_CSR_EXIINT | EXI_CSR_EXTIN | csr_mask); } /* @@ -1303,7 +1303,7 @@ if ((__to_channel(exi_channel) == 0 || __to_channel(exi_channel) == 1) && exi_device->eid.device == 0) { - if (readl(csr_reg) & EXI_CSR_EXT) { + if (in_be32(csr_reg) & EXI_CSR_EXT) { id = EXI_ID_NONE; } } @@ -1318,7 +1318,7 @@ int exi_get_ext_line(struct exi_channel *exi_channel) { u32 __iomem *csr_reg = exi_channel->io_base + EXI_CSR; - return (readl(csr_reg) & EXI_CSR_EXT)?1:0; + return (in_be32(csr_reg) & EXI_CSR_EXT)?1:0; } /* |