Update of /cvsroot/gc-linux/binutils/include/opcode
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv25832/include/opcode
Modified Files:
ppc.h
Log Message:
Merge http://www.helsinki.fi/~ammonton/gekko-041107.patch
- Add support for General Quantization Registers (GQRs)
- Accompanying insns: psq_lx,lux,stx,stux,l,lu,st,stu dcbz_l
Index: ppc.h
===================================================================
RCS file: /cvsroot/gc-linux/binutils/include/opcode/ppc.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- ppc.h 17 Jul 2005 00:14:51 -0000 1.2
+++ ppc.h 18 Jul 2005 00:18:20 -0000 1.3
@@ -134,7 +134,7 @@
/* Opcode is supported by machine check APU. */
#define PPC_OPCODE_RFMCI 0x800000
-/* Opcode is only supported by PowerPC Gekko processor */
+/* Opcode is only supported by the PowerPC Gekko processor */
#define PPC_OPCODE_GEKKO 0x1000000
/* A macro to extract the major opcode from an instruction. */
@@ -284,6 +284,10 @@
/* This operand is for the DQ field in a DQ form instruction. */
#define PPC_OPERAND_DQ (0100000)
+/* This operand names a quantization register. The disassembler
+ prints these with a leading 'gqr'. */
+#define PPC_OPERAND_GQR (0200000)
+
/* The POWER and PowerPC assemblers use a few macros. We keep them
with the operands table for simplicity. The macro table is an
array of struct powerpc_macro. */
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