Update of /cvsroot/gc-linux/linux/arch/ppc/boot/simple
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv24768/arch/ppc/boot/simple
Modified Files:
Makefile embed_config.c misc-embedded.c
Log Message:
Merge 2.6.10
Index: Makefile
===================================================================
RCS file: /cvsroot/gc-linux/linux/arch/ppc/boot/simple/Makefile,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- Makefile 19 Oct 2004 09:46:08 -0000 1.9
+++ Makefile 4 Jan 2005 21:39:02 -0000 1.10
@@ -41,7 +41,7 @@
# if present on 'classic' PPC.
cacheflag-y := -DCLEAR_CACHES=""
# This file will flush / disable the L2, and L3 if present.
-clear_L2_L3 := $(boot)/simple/clear.S
+clear_L2_L3 := $(srctree)/$(boot)/simple/clear.S
#
# See arch/ppc/kconfig and arch/ppc/platforms/Kconfig
Index: embed_config.c
===================================================================
RCS file: /cvsroot/gc-linux/linux/arch/ppc/boot/simple/embed_config.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- embed_config.c 19 Oct 2004 23:18:39 -0000 1.6
+++ embed_config.c 4 Jan 2005 21:39:02 -0000 1.7
@@ -752,25 +752,25 @@
static const unsigned long line_size = 32;
static const unsigned long congruence_classes = 256;
unsigned long addr;
- u_char *cp;
- int i;
+ unsigned long dccr;
bd_t *bd;
/*
- * At one point, we were getting machine checks. Linux was not
- * invalidating the data cache before it was enabled. The
- * following code was added to do that. Soon after we had done
- * that, we found the real reasons for the machine checks. I've
- * run the kernel a few times with the following code
- * temporarily removed without any apparent problems. However,
- * I objdump'ed the kernel and boot code and found out that
- * there were no other dccci's anywhere, so I put the code back
- * in and have been reluctant to remove it. It seems safer to
- * just leave it here.
+ * Invalidate the data cache if the data cache is turned off.
+ * - The 405 core does not invalidate the data cache on power-up
+ * or reset but does turn off the data cache. We cannot assume
+ * that the cache contents are valid.
+ * - If the data cache is turned on this must have been done by
+ * a bootloader and we assume that the cache contents are
+ * valid.
*/
- for (addr = 0;
- addr < (congruence_classes * line_size); addr += line_size) {
- __asm__("dccci 0,%0": :"b"(addr));
+ __asm__("mfdccr %0": "=r" (dccr));
+ if (dccr == 0) {
+ for (addr = 0;
+ addr < (congruence_classes * line_size);
+ addr += line_size) {
+ __asm__("dccci 0,%0": :"b"(addr));
+ }
}
bd = &bdinfo;
@@ -778,6 +778,9 @@
bd->bi_memsize = XPAR_DDR_0_SIZE;
bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ;
bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ;
+ bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ;
+ timebase_period_ns = 1000000000 / bd->bi_tbfreq;
+ /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
}
#endif /* CONFIG_XILINX_ML300 */
Index: misc-embedded.c
===================================================================
RCS file: /cvsroot/gc-linux/linux/arch/ppc/boot/simple/misc-embedded.c,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- misc-embedded.c 19 Oct 2004 23:18:39 -0000 1.6
+++ misc-embedded.c 4 Jan 2005 21:39:03 -0000 1.7
@@ -226,7 +226,7 @@
puts("done.\n");
{
struct bi_record *rec;
- unsigned long initrd_loc;
+ unsigned long initrd_loc = 0;
unsigned long rec_loc = _ALIGN((unsigned long)(zimage_size) +
(1 << 20) - 1, (1 << 20));
rec = (struct bi_record *)rec_loc;
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