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From: Albert H. <he...@us...> - 2009-10-25 18:45:47
|
Update of /cvsroot/gc-linux/linux/drivers/usb/host In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/usb/host Modified Files: Kconfig Added Files: ehci-hcd.c ehci.h ohci-hcd.c ohci-q.c ohci.h Log Message: Forward to v.2.6.30. --- NEW FILE: ohci-q.c --- /* * OHCI HCD (Host Controller Driver) for USB. * * (C) Copyright 1999 Roman Weissgaerber <we...@vi...> * (C) Copyright 2000-2002 David Brownell <dbr...@us...> * * This file is licenced under the GPL. */ #include <linux/irq.h> static void urb_free_priv (struct ohci_hcd *hc, urb_priv_t *urb_priv) { int last = urb_priv->length - 1; if (last >= 0) { int i; struct td *td; [...1090 lines suppressed...] /* * Process normal completions (error or success) and clean the schedules. * * This is the main path for handing urbs back to drivers. The only other * normal path is finish_unlinks(), which unlinks URBs using ed_rm_list, * instead of scanning the (re-reversed) donelist as this does. There's * an abnormal path too, handling a quirk in some Compaq silicon: URBs * with TDs that appear to be orphaned are directly reclaimed. */ static void dl_done_list (struct ohci_hcd *ohci) { struct td *td = dl_reverse_done_list (ohci); while (td) { struct td *td_next = td->next_dl_td; takeback_td(ohci, td); td = td_next; } } --- NEW FILE: ehci.h --- /* * Copyright (c) 2001-2002 by David Brownell * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #ifndef __LINUX_EHCI_HCD_H #define __LINUX_EHCI_HCD_H /* definitions used for the EHCI driver */ /* * __hc32 and __hc16 are "Host Controller" types, they may be equivalent to * __leXX (normally) or __beXX (given EHCI_BIG_ENDIAN_DESC), depending on * the host controller implementation. * * To facilitate the strongest possible byte-order checking from "sparse" * and so on, we use __leXX unless that's not practical. */ #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_DESC typedef __u32 __bitwise __hc32; typedef __u16 __bitwise __hc16; #else #define __hc32 __le32 #define __hc16 __le16 #endif /* statistics can be kept for for tuning/monitoring */ struct ehci_stats { /* irq usage */ unsigned long normal; unsigned long error; unsigned long reclaim; unsigned long lost_iaa; /* termination of urbs from core */ unsigned long complete; unsigned long unlink; }; /* ehci_hcd->lock guards shared data against other CPUs: * ehci_hcd: async, reclaim, periodic (and shadow), ... * usb_host_endpoint: hcpriv * ehci_qh: qh_next, qtd_list * ehci_qtd: qtd_list * * Also, hold this lock when talking to HC registers or * when updating hw_* fields in shared qh/qtd/... structures. */ #define EHCI_MAX_ROOT_PORTS 15 /* see HCS_N_PORTS */ struct ehci_hcd { /* one per controller */ /* glue to PCI and HCD framework */ struct ehci_caps __iomem *caps; struct ehci_regs __iomem *regs; struct ehci_dbg_port __iomem *debug; __u32 hcs_params; /* cached register copy */ spinlock_t lock; /* async schedule support */ struct ehci_qh *async; struct ehci_qh *reclaim; unsigned scanning : 1; /* periodic schedule support */ #define DEFAULT_I_TDPS 1024 /* some HCs can do less */ unsigned periodic_size; __hc32 *periodic; /* hw periodic table */ dma_addr_t periodic_dma; unsigned i_thresh; /* uframes HC might cache */ union ehci_shadow *pshadow; /* mirror hw periodic table */ int next_uframe; /* scan periodic, start here */ unsigned periodic_sched; /* periodic activity count */ /* list of itds completed while clock_frame was still active */ struct list_head cached_itd_list; unsigned clock_frame; /* per root hub port */ unsigned long reset_done [EHCI_MAX_ROOT_PORTS]; /* bit vectors (one bit per port) */ unsigned long bus_suspended; /* which ports were already suspended at the start of a bus suspend */ unsigned long companion_ports; /* which ports are dedicated to the companion controller */ unsigned long owned_ports; /* which ports are owned by the companion during a bus suspend */ unsigned long port_c_suspend; /* which ports have the change-suspend feature turned on */ unsigned long suspended_ports; /* which ports are suspended */ /* per-HC memory pools (could be per-bus, but ...) */ struct dma_pool *qh_pool; /* qh per active urb */ struct dma_pool *qtd_pool; /* one or more per qh */ struct dma_pool *itd_pool; /* itd per iso urb */ struct dma_pool *sitd_pool; /* sitd per split iso urb */ struct timer_list iaa_watchdog; struct timer_list watchdog; unsigned long actions; unsigned stamp; unsigned long next_statechange; u32 command; /* SILICON QUIRKS */ unsigned no_selective_suspend:1; unsigned has_fsl_port_bug:1; /* FreeScale */ unsigned big_endian_mmio:1; unsigned big_endian_desc:1; unsigned has_amcc_usb23:1; /* required for usb32 quirk */ #define OHCI_CTRL_HCFS (3 << 6) #define OHCI_USB_OPER (2 << 6) #define OHCI_USB_SUSPEND (3 << 6) #define OHCI_HCCTRL_OFFSET 0x4 #define OHCI_HCCTRL_LEN 0x4 __hc32 *ohci_hcctrl_reg; u8 sbrn; /* packed release number */ /* irq statistics */ #ifdef EHCI_STATS struct ehci_stats stats; # define COUNT(x) do { (x)++; } while (0) #else # define COUNT(x) do {} while (0) #endif /* debug files */ #ifdef DEBUG struct dentry *debug_dir; struct dentry *debug_async; struct dentry *debug_periodic; struct dentry *debug_registers; #endif }; /* convert between an HCD pointer and the corresponding EHCI_HCD */ static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd) { return (struct ehci_hcd *) (hcd->hcd_priv); } static inline struct usb_hcd *ehci_to_hcd (struct ehci_hcd *ehci) { return container_of ((void *) ehci, struct usb_hcd, hcd_priv); } static inline void iaa_watchdog_start(struct ehci_hcd *ehci) { WARN_ON(timer_pending(&ehci->iaa_watchdog)); mod_timer(&ehci->iaa_watchdog, jiffies + msecs_to_jiffies(EHCI_IAA_MSECS)); } static inline void iaa_watchdog_done(struct ehci_hcd *ehci) { del_timer(&ehci->iaa_watchdog); } enum ehci_timer_action { TIMER_IO_WATCHDOG, TIMER_ASYNC_SHRINK, TIMER_ASYNC_OFF, }; static inline void timer_action_done (struct ehci_hcd *ehci, enum ehci_timer_action action) { clear_bit (action, &ehci->actions); } static void free_cached_itd_list(struct ehci_hcd *ehci); /*-------------------------------------------------------------------------*/ #include <linux/usb/ehci_def.h> /*-------------------------------------------------------------------------*/ #define QTD_NEXT(ehci, dma) cpu_to_hc32(ehci, (u32)dma) /* * EHCI Specification 0.95 Section 3.5 * QTD: describe data transfer components (buffer, direction, ...) * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram". * * These are associated only with "QH" (Queue Head) structures, * used with control, bulk, and interrupt transfers. */ struct ehci_qtd { /* first part defined by EHCI spec */ __hc32 hw_next; /* see EHCI 3.5.1 */ __hc32 hw_alt_next; /* see EHCI 3.5.2 */ __hc32 hw_token; /* see EHCI 3.5.3 */ #define QTD_TOGGLE (1 << 31) /* data toggle */ #define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff) #define QTD_IOC (1 << 15) /* interrupt on complete */ #define QTD_CERR(tok) (((tok)>>10) & 0x3) #define QTD_PID(tok) (((tok)>>8) & 0x3) #define QTD_STS_ACTIVE (1 << 7) /* HC may execute this */ #define QTD_STS_HALT (1 << 6) /* halted on error */ #define QTD_STS_DBE (1 << 5) /* data buffer error (in HC) */ #define QTD_STS_BABBLE (1 << 4) /* device was babbling (qtd halted) */ #define QTD_STS_XACT (1 << 3) /* device gave illegal response */ #define QTD_STS_MMF (1 << 2) /* incomplete split transaction */ #define QTD_STS_STS (1 << 1) /* split transaction state */ #define QTD_STS_PING (1 << 0) /* issue PING? */ #define ACTIVE_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_ACTIVE) #define HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT) #define STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS) __hc32 hw_buf [5]; /* see EHCI 3.5.4 */ __hc32 hw_buf_hi [5]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t qtd_dma; /* qtd address */ struct list_head qtd_list; /* sw qtd list */ struct urb *urb; /* qtd's urb */ size_t length; /* length of buffer */ } __attribute__ ((aligned (32))); /* mask NakCnt+T in qh->hw_alt_next */ #define QTD_MASK(ehci) cpu_to_hc32 (ehci, ~0x1f) #define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1) /*-------------------------------------------------------------------------*/ /* type tag from {qh,itd,sitd,fstn}->hw_next */ #define Q_NEXT_TYPE(ehci,dma) ((dma) & cpu_to_hc32(ehci, 3 << 1)) /* * Now the following defines are not converted using the * cpu_to_le32() macro anymore, since we have to support * "dynamic" switching between be and le support, so that the driver * can be used on one system with SoC EHCI controller using big-endian * descriptors as well as a normal little-endian PCI EHCI controller. */ /* values for that type tag */ #define Q_TYPE_ITD (0 << 1) #define Q_TYPE_QH (1 << 1) #define Q_TYPE_SITD (2 << 1) #define Q_TYPE_FSTN (3 << 1) /* next async queue entry, or pointer to interrupt/periodic QH */ #define QH_NEXT(ehci,dma) (cpu_to_hc32(ehci, (((u32)dma)&~0x01f)|Q_TYPE_QH)) /* for periodic/async schedules and qtd lists, mark end of list */ #define EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */ /* * Entries in periodic shadow table are pointers to one of four kinds * of data structure. That's dictated by the hardware; a type tag is * encoded in the low bits of the hardware's periodic schedule. Use * Q_NEXT_TYPE to get the tag. * * For entries in the async schedule, the type tag always says "qh". */ union ehci_shadow { struct ehci_qh *qh; /* Q_TYPE_QH */ struct ehci_itd *itd; /* Q_TYPE_ITD */ struct ehci_sitd *sitd; /* Q_TYPE_SITD */ struct ehci_fstn *fstn; /* Q_TYPE_FSTN */ __hc32 *hw_next; /* (all types) */ void *ptr; }; /*-------------------------------------------------------------------------*/ /* * EHCI Specification 0.95 Section 3.6 * QH: describes control/bulk/interrupt endpoints * See Fig 3-7 "Queue Head Structure Layout". * * These appear in both the async and (for interrupt) periodic schedules. */ struct ehci_qh { /* first part defined by EHCI spec */ __hc32 hw_next; /* see EHCI 3.6.1 */ __hc32 hw_info1; /* see EHCI 3.6.2 */ #define QH_HEAD 0x00008000 __hc32 hw_info2; /* see EHCI 3.6.2 */ #define QH_SMASK 0x000000ff #define QH_CMASK 0x0000ff00 #define QH_HUBADDR 0x007f0000 #define QH_HUBPORT 0x3f800000 #define QH_MULT 0xc0000000 __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */ /* qtd overlay (hardware parts of a struct ehci_qtd) */ __hc32 hw_qtd_next; __hc32 hw_alt_next; __hc32 hw_token; __hc32 hw_buf [5]; __hc32 hw_buf_hi [5]; /* the rest is HCD-private */ dma_addr_t qh_dma; /* address of qh */ union ehci_shadow qh_next; /* ptr to qh; or periodic */ struct list_head qtd_list; /* sw qtd list */ struct ehci_qtd *dummy; struct ehci_qh *reclaim; /* next to reclaim */ struct ehci_hcd *ehci; /* * Do NOT use atomic operations for QH refcounting. On some CPUs * (PPC7448 for example), atomic operations cannot be performed on * memory that is cache-inhibited (i.e. being used for DMA). * Spinlocks are used to protect all QH fields. */ u32 refcount; unsigned stamp; u8 qh_state; #define QH_STATE_LINKED 1 /* HC sees this */ #define QH_STATE_UNLINK 2 /* HC may still see this */ #define QH_STATE_IDLE 3 /* HC doesn't see this */ #define QH_STATE_UNLINK_WAIT 4 /* LINKED and on reclaim q */ #define QH_STATE_COMPLETING 5 /* don't touch token.HALT */ u8 xacterrs; /* XactErr retry counter */ #define QH_XACTERR_MAX 32 /* XactErr retry limit */ /* periodic schedule info */ u8 usecs; /* intr bandwidth */ u8 gap_uf; /* uframes split/csplit gap */ u8 c_usecs; /* ... split completion bw */ u16 tt_usecs; /* tt downstream bandwidth */ unsigned short period; /* polling interval */ unsigned short start; /* where polling starts */ #define NO_FRAME ((unsigned short)~0) /* pick new start */ struct usb_device *dev; /* access to TT */ } __attribute__ ((aligned (32))); /*-------------------------------------------------------------------------*/ /* description of one iso transaction (up to 3 KB data if highspeed) */ struct ehci_iso_packet { /* These will be copied to iTD when scheduling */ u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */ __hc32 transaction; /* itd->hw_transaction[i] |= */ u8 cross; /* buf crosses pages */ /* for full speed OUT splits */ u32 buf1; }; /* temporary schedule data for packets from iso urbs (both speeds) * each packet is one logical usb transaction to the device (not TT), * beginning at stream->next_uframe */ struct ehci_iso_sched { struct list_head td_list; unsigned span; struct ehci_iso_packet packet [0]; }; /* * ehci_iso_stream - groups all (s)itds for this endpoint. * acts like a qh would, if EHCI had them for ISO. */ struct ehci_iso_stream { /* first two fields match QH, but info1 == 0 */ __hc32 hw_next; __hc32 hw_info1; u32 refcount; u8 bEndpointAddress; u8 highspeed; u16 depth; /* depth in uframes */ struct list_head td_list; /* queued itds/sitds */ struct list_head free_list; /* list of unused itds/sitds */ struct usb_device *udev; struct usb_host_endpoint *ep; /* output of (re)scheduling */ unsigned long start; /* jiffies */ unsigned long rescheduled; int next_uframe; __hc32 splits; /* the rest is derived from the endpoint descriptor, * trusting urb->interval == f(epdesc->bInterval) and * including the extra info for hw_bufp[0..2] */ u8 usecs, c_usecs; u16 interval; u16 tt_usecs; u16 maxp; u16 raw_mask; unsigned bandwidth; /* This is used to initialize iTD's hw_bufp fields */ __hc32 buf0; __hc32 buf1; __hc32 buf2; /* this is used to initialize sITD's tt info */ __hc32 address; }; /*-------------------------------------------------------------------------*/ /* * EHCI Specification 0.95 Section 3.3 * Fig 3-4 "Isochronous Transaction Descriptor (iTD)" * * Schedule records for high speed iso xfers */ struct ehci_itd { /* first part defined by EHCI spec */ __hc32 hw_next; /* see EHCI 3.3.1 */ __hc32 hw_transaction [8]; /* see EHCI 3.3.2 */ #define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */ #define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */ #define EHCI_ISOC_BABBLE (1<<29) /* babble detected */ #define EHCI_ISOC_XACTERR (1<<28) /* XactErr - transaction error */ #define EHCI_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff) #define EHCI_ITD_IOC (1 << 15) /* interrupt on complete */ #define ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE) __hc32 hw_bufp [7]; /* see EHCI 3.3.3 */ __hc32 hw_bufp_hi [7]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t itd_dma; /* for this itd */ union ehci_shadow itd_next; /* ptr to periodic q entry */ struct urb *urb; struct ehci_iso_stream *stream; /* endpoint's queue */ struct list_head itd_list; /* list of stream's itds */ /* any/all hw_transactions here may be used by that urb */ unsigned frame; /* where scheduled */ unsigned pg; unsigned index[8]; /* in urb->iso_frame_desc */ } __attribute__ ((aligned (32))); /*-------------------------------------------------------------------------*/ /* * EHCI Specification 0.95 Section 3.4 * siTD, aka split-transaction isochronous Transfer Descriptor * ... describe full speed iso xfers through TT in hubs * see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD) */ struct ehci_sitd { /* first part defined by EHCI spec */ __hc32 hw_next; /* uses bit field macros above - see EHCI 0.95 Table 3-8 */ __hc32 hw_fullspeed_ep; /* EHCI table 3-9 */ __hc32 hw_uframe; /* EHCI table 3-10 */ __hc32 hw_results; /* EHCI table 3-11 */ #define SITD_IOC (1 << 31) /* interrupt on completion */ #define SITD_PAGE (1 << 30) /* buffer 0/1 */ #define SITD_LENGTH(x) (0x3ff & ((x)>>16)) #define SITD_STS_ACTIVE (1 << 7) /* HC may execute this */ #define SITD_STS_ERR (1 << 6) /* error from TT */ #define SITD_STS_DBE (1 << 5) /* data buffer error (in HC) */ #define SITD_STS_BABBLE (1 << 4) /* device was babbling */ #define SITD_STS_XACT (1 << 3) /* illegal IN response */ #define SITD_STS_MMF (1 << 2) /* incomplete split transaction */ #define SITD_STS_STS (1 << 1) /* split transaction state */ #define SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE) __hc32 hw_buf [2]; /* EHCI table 3-12 */ __hc32 hw_backpointer; /* EHCI table 3-13 */ __hc32 hw_buf_hi [2]; /* Appendix B */ /* the rest is HCD-private */ dma_addr_t sitd_dma; union ehci_shadow sitd_next; /* ptr to periodic q entry */ struct urb *urb; struct ehci_iso_stream *stream; /* endpoint's queue */ struct list_head sitd_list; /* list of stream's sitds */ unsigned frame; unsigned index; } __attribute__ ((aligned (32))); /*-------------------------------------------------------------------------*/ /* * EHCI Specification 0.96 Section 3.7 * Periodic Frame Span Traversal Node (FSTN) * * Manages split interrupt transactions (using TT) that span frame boundaries * into uframes 0/1; see 4.12.2.2. In those uframes, a "save place" FSTN * makes the HC jump (back) to a QH to scan for fs/ls QH completions until * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work. */ struct ehci_fstn { __hc32 hw_next; /* any periodic q entry */ __hc32 hw_prev; /* qh or EHCI_LIST_END */ /* the rest is HCD-private */ dma_addr_t fstn_dma; union ehci_shadow fstn_next; /* ptr to periodic q entry */ } __attribute__ ((aligned (32))); /*-------------------------------------------------------------------------*/ #ifdef CONFIG_USB_EHCI_ROOT_HUB_TT /* * Some EHCI controllers have a Transaction Translator built into the * root hub. This is a non-standard feature. Each controller will need * to add code to the following inline functions, and call them as * needed (mostly in root hub code). */ #define ehci_is_TDI(e) (ehci_to_hcd(e)->has_tt) /* Returns the speed of a device attached to a port on the root hub. */ static inline unsigned int ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc) { if (ehci_is_TDI(ehci)) { switch ((portsc>>26)&3) { case 0: return 0; case 1: return (1<<USB_PORT_FEAT_LOWSPEED); case 2: default: return (1<<USB_PORT_FEAT_HIGHSPEED); } } return (1<<USB_PORT_FEAT_HIGHSPEED); } #else #define ehci_is_TDI(e) (0) #define ehci_port_speed(ehci, portsc) (1<<USB_PORT_FEAT_HIGHSPEED) #endif /*-------------------------------------------------------------------------*/ #ifdef CONFIG_PPC_83xx /* Some Freescale processors have an erratum in which the TT * port number in the queue head was 0..N-1 instead of 1..N. */ #define ehci_has_fsl_portno_bug(e) ((e)->has_fsl_port_bug) #else #define ehci_has_fsl_portno_bug(e) (0) #endif /* * While most USB host controllers implement their registers in * little-endian format, a minority (celleb companion chip) implement * them in big endian format. * * This attempts to support either format at compile time without a * runtime penalty, or both formats with the additional overhead * of checking a flag bit. */ #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO #define ehci_big_endian_mmio(e) ((e)->big_endian_mmio) #else #define ehci_big_endian_mmio(e) 0 #endif /* * Big-endian read/write functions are arch-specific. * Other arches can be added if/when they're needed. */ #if defined(CONFIG_ARM) && defined(CONFIG_ARCH_IXP4XX) #define readl_be(addr) __raw_readl((__force unsigned *)addr) #define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr) #endif static inline unsigned int ehci_readl(const struct ehci_hcd *ehci, __u32 __iomem * regs) { #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO return ehci_big_endian_mmio(ehci) ? readl_be(regs) : readl(regs); #else return readl(regs); #endif } static inline void ehci_writel(const struct ehci_hcd *ehci, const unsigned int val, __u32 __iomem *regs) { #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO ehci_big_endian_mmio(ehci) ? writel_be(val, regs) : writel(val, regs); #else writel(val, regs); #endif } /* * On certain ppc-44x SoC there is a HW issue, that could only worked around with * explicit suspend/operate of OHCI. This function hereby makes sense only on that arch. * Other common bits are dependant on has_amcc_usb23 quirk flag. */ #ifdef CONFIG_44x static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational) { u32 hc_control; hc_control = (readl_be(ehci->ohci_hcctrl_reg) & ~OHCI_CTRL_HCFS); if (operational) hc_control |= OHCI_USB_OPER; else hc_control |= OHCI_USB_SUSPEND; writel_be(hc_control, ehci->ohci_hcctrl_reg); (void) readl_be(ehci->ohci_hcctrl_reg); } #else static inline void set_ohci_hcfs(struct ehci_hcd *ehci, int operational) { } #endif /*-------------------------------------------------------------------------*/ /* * The AMCC 440EPx not only implements its EHCI registers in big-endian * format, but also its DMA data structures (descriptors). * * EHCI controllers accessed through PCI work normally (little-endian * everywhere), so we won't bother supporting a BE-only mode for now. */ #ifdef CONFIG_USB_EHCI_BIG_ENDIAN_DESC #define ehci_big_endian_desc(e) ((e)->big_endian_desc) /* cpu to ehci */ static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x) { return ehci_big_endian_desc(ehci) ? (__force __hc32)cpu_to_be32(x) : (__force __hc32)cpu_to_le32(x); } /* ehci to cpu */ static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x) { return ehci_big_endian_desc(ehci) ? be32_to_cpu((__force __be32)x) : le32_to_cpu((__force __le32)x); } static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x) { return ehci_big_endian_desc(ehci) ? be32_to_cpup((__force __be32 *)x) : le32_to_cpup((__force __le32 *)x); } #else /* cpu to ehci */ static inline __hc32 cpu_to_hc32 (const struct ehci_hcd *ehci, const u32 x) { return cpu_to_le32(x); } /* ehci to cpu */ static inline u32 hc32_to_cpu (const struct ehci_hcd *ehci, const __hc32 x) { return le32_to_cpu(x); } static inline u32 hc32_to_cpup (const struct ehci_hcd *ehci, const __hc32 *x) { return le32_to_cpup(x); } #endif /*-------------------------------------------------------------------------*/ #ifndef DEBUG #define STUB_DEBUG_FILES #endif /* DEBUG */ /*-------------------------------------------------------------------------*/ #endif /* __LINUX_EHCI_HCD_H */ Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/usb/host/Kconfig,v retrieving revision 1.7 retrieving revision 1.8 diff -C2 -d -r1.7 -r1.8 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.7 --- Kconfig 25 Oct 2009 18:45:36 -0000 1.8 *************** *** 25,32 **** "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware. If your USB host controller supports USB 2.0, you will likely want to ! configure this Host Controller Driver. At the time of this writing, ! the primary implementation of EHCI is a chip from NEC, widely available ! in add-on PCI cards, but implementations are in the works from other ! vendors including Intel and Philips. Motherboard support is appearing. EHCI controllers are packaged with "companion" host controllers (OHCI --- 25,29 ---- "high speed" (480 Mbit/sec, 60 Mbyte/sec) host controller hardware. If your USB host controller supports USB 2.0, you will likely want to ! configure this Host Controller Driver. EHCI controllers are packaged with "companion" host controllers (OHCI *************** *** 124,128 **** config USB_ISP1760_HCD tristate "ISP 1760 HCD support" ! depends on USB && EXPERIMENTAL && (PCI || PPC_OF) ---help--- The ISP1760 chip is a USB 2.0 host controller. --- 121,125 ---- config USB_ISP1760_HCD tristate "ISP 1760 HCD support" ! depends on USB && EXPERIMENTAL ---help--- The ISP1760 chip is a USB 2.0 host controller. --- NEW FILE: ohci.h --- /* * OHCI HCD (Host Controller Driver) for USB. * * (C) Copyright 1999 Roman Weissgaerber <we...@vi...> * (C) Copyright 2000-2002 David Brownell <dbr...@us...> * * This file is licenced under the GPL. */ /* * __hc32 and __hc16 are "Host Controller" types, they may be equivalent to * __leXX (normally) or __beXX (given OHCI_BIG_ENDIAN), depending on the * host controller implementation. */ typedef __u32 __bitwise __hc32; typedef __u16 __bitwise __hc16; /* * OHCI Endpoint Descriptor (ED) ... holds TD queue * See OHCI spec, section 4.2 * * This is a "Queue Head" for those transfers, which is why * both EHCI and UHCI call similar structures a "QH". */ struct ed { /* first fields are hardware-specified */ __hc32 hwINFO; /* endpoint config bitmap */ /* info bits defined by hcd */ #define ED_DEQUEUE (1 << 27) /* info bits defined by the hardware */ #define ED_ISO (1 << 15) #define ED_SKIP (1 << 14) #define ED_LOWSPEED (1 << 13) #define ED_OUT (0x01 << 11) #define ED_IN (0x02 << 11) __hc32 hwTailP; /* tail of TD list */ __hc32 hwHeadP; /* head of TD list (hc r/w) */ #define ED_C (0x02) /* toggle carry */ #define ED_H (0x01) /* halted */ __hc32 hwNextED; /* next ED in list */ /* rest are purely for the driver's use */ dma_addr_t dma; /* addr of ED */ struct td *dummy; /* next TD to activate */ /* host's view of schedule */ struct ed *ed_next; /* on schedule or rm_list */ struct ed *ed_prev; /* for non-interrupt EDs */ struct list_head td_list; /* "shadow list" of our TDs */ /* create --> IDLE --> OPER --> ... --> IDLE --> destroy * usually: OPER --> UNLINK --> (IDLE | OPER) --> ... */ u8 state; /* ED_{IDLE,UNLINK,OPER} */ #define ED_IDLE 0x00 /* NOT linked to HC */ #define ED_UNLINK 0x01 /* being unlinked from hc */ #define ED_OPER 0x02 /* IS linked to hc */ u8 type; /* PIPE_{BULK,...} */ /* periodic scheduling params (for intr and iso) */ u8 branch; u16 interval; u16 load; u16 last_iso; /* iso only */ /* HC may see EDs on rm_list until next frame (frame_no == tick) */ u16 tick; } __attribute__ ((aligned(16))); #define ED_MASK ((u32)~0x0f) /* strip hw status in low addr bits */ /* * OHCI Transfer Descriptor (TD) ... one per transfer segment * See OHCI spec, sections 4.3.1 (general = control/bulk/interrupt) * and 4.3.2 (iso) */ struct td { /* first fields are hardware-specified */ __hc32 hwINFO; /* transfer info bitmask */ /* hwINFO bits for both general and iso tds: */ #define TD_CC 0xf0000000 /* condition code */ #define TD_CC_GET(td_p) ((td_p >>28) & 0x0f) //#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28) #define TD_DI 0x00E00000 /* frames before interrupt */ #define TD_DI_SET(X) (((X) & 0x07)<< 21) /* these two bits are available for definition/use by HCDs in both * general and iso tds ... others are available for only one type */ #define TD_DONE 0x00020000 /* retired to donelist */ #define TD_ISO 0x00010000 /* copy of ED_ISO */ /* hwINFO bits for general tds: */ #define TD_EC 0x0C000000 /* error count */ #define TD_T 0x03000000 /* data toggle state */ #define TD_T_DATA0 0x02000000 /* DATA0 */ #define TD_T_DATA1 0x03000000 /* DATA1 */ #define TD_T_TOGGLE 0x00000000 /* uses ED_C */ #define TD_DP 0x00180000 /* direction/pid */ #define TD_DP_SETUP 0x00000000 /* SETUP pid */ #define TD_DP_IN 0x00100000 /* IN pid */ #define TD_DP_OUT 0x00080000 /* OUT pid */ /* 0x00180000 rsvd */ #define TD_R 0x00040000 /* round: short packets OK? */ /* (no hwINFO #defines yet for iso tds) */ __hc32 hwCBP; /* Current Buffer Pointer (or 0) */ __hc32 hwNextTD; /* Next TD Pointer */ __hc32 hwBE; /* Memory Buffer End Pointer */ /* PSW is only for ISO. Only 1 PSW entry is used, but on * big-endian PPC hardware that's the second entry. */ #define MAXPSW 2 __hc16 hwPSW [MAXPSW]; /* rest are purely for the driver's use */ __u8 index; struct ed *ed; struct td *td_hash; /* dma-->td hashtable */ struct td *next_dl_td; struct urb *urb; dma_addr_t td_dma; /* addr of this TD */ dma_addr_t data_dma; /* addr of data it points to */ struct list_head td_list; /* "shadow list", TDs on same ED */ } __attribute__ ((aligned(32))); /* c/b/i need 16; only iso needs 32 */ #define TD_MASK ((u32)~0x1f) /* strip hw status in low addr bits */ /* * Hardware transfer status codes -- CC from td->hwINFO or td->hwPSW */ #define TD_CC_NOERROR 0x00 #define TD_CC_CRC 0x01 #define TD_CC_BITSTUFFING 0x02 #define TD_CC_DATATOGGLEM 0x03 #define TD_CC_STALL 0x04 #define TD_DEVNOTRESP 0x05 #define TD_PIDCHECKFAIL 0x06 #define TD_UNEXPECTEDPID 0x07 #define TD_DATAOVERRUN 0x08 #define TD_DATAUNDERRUN 0x09 /* 0x0A, 0x0B reserved for hardware */ #define TD_BUFFEROVERRUN 0x0C #define TD_BUFFERUNDERRUN 0x0D /* 0x0E, 0x0F reserved for HCD */ #define TD_NOTACCESSED 0x0F /* map OHCI TD status codes (CC) to errno values */ static const int cc_to_error [16] = { /* No Error */ 0, /* CRC Error */ -EILSEQ, /* Bit Stuff */ -EPROTO, /* Data Togg */ -EILSEQ, /* Stall */ -EPIPE, /* DevNotResp */ -ETIME, /* PIDCheck */ -EPROTO, /* UnExpPID */ -EPROTO, /* DataOver */ -EOVERFLOW, /* DataUnder */ -EREMOTEIO, /* (for hw) */ -EIO, /* (for hw) */ -EIO, /* BufferOver */ -ECOMM, /* BuffUnder */ -ENOSR, /* (for HCD) */ -EALREADY, /* (for HCD) */ -EALREADY }; /* * The HCCA (Host Controller Communications Area) is a 256 byte * structure defined section 4.4.1 of the OHCI spec. The HC is * told the base address of it. It must be 256-byte aligned. */ struct ohci_hcca { #define NUM_INTS 32 __hc32 int_table [NUM_INTS]; /* periodic schedule */ /* * OHCI defines u16 frame_no, followed by u16 zero pad. * Since some processors can't do 16 bit bus accesses, * portable access must be a 32 bits wide. */ __hc32 frame_no; /* current frame number */ __hc32 done_head; /* info returned for an interrupt */ u8 reserved_for_hc [116]; u8 what [4]; /* spec only identifies 252 bytes :) */ } __attribute__ ((aligned(256))); /* * This is the structure of the OHCI controller's memory mapped I/O region. * You must use readl() and writel() (in <asm/io.h>) to access these fields!! * Layout is in section 7 (and appendix B) of the spec. */ struct ohci_regs { /* control and status registers (section 7.1) */ __hc32 revision; __hc32 control; __hc32 cmdstatus; __hc32 intrstatus; __hc32 intrenable; __hc32 intrdisable; /* memory pointers (section 7.2) */ __hc32 hcca; __hc32 ed_periodcurrent; __hc32 ed_controlhead; __hc32 ed_controlcurrent; __hc32 ed_bulkhead; __hc32 ed_bulkcurrent; __hc32 donehead; /* frame counters (section 7.3) */ __hc32 fminterval; __hc32 fmremaining; __hc32 fmnumber; __hc32 periodicstart; __hc32 lsthresh; /* Root hub ports (section 7.4) */ struct ohci_roothub_regs { __hc32 a; __hc32 b; __hc32 status; #define MAX_ROOT_PORTS 15 /* maximum OHCI root hub ports (RH_A_NDP) */ __hc32 portstatus [MAX_ROOT_PORTS]; } roothub; /* and optional "legacy support" registers (appendix B) at 0x0100 */ } __attribute__ ((aligned(32))); /* OHCI CONTROL AND STATUS REGISTER MASKS */ /* * HcControl (control) register masks */ #define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */ #define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */ #define OHCI_CTRL_IE (1 << 3) /* isochronous enable */ #define OHCI_CTRL_CLE (1 << 4) /* control list enable */ #define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */ #define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */ #define OHCI_CTRL_IR (1 << 8) /* interrupt routing */ #define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */ #define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */ /* pre-shifted values for HCFS */ # define OHCI_USB_RESET (0 << 6) # define OHCI_USB_RESUME (1 << 6) # define OHCI_USB_OPER (2 << 6) # define OHCI_USB_SUSPEND (3 << 6) /* * HcCommandStatus (cmdstatus) register masks */ #define OHCI_HCR (1 << 0) /* host controller reset */ #define OHCI_CLF (1 << 1) /* control list filled */ #define OHCI_BLF (1 << 2) /* bulk list filled */ #define OHCI_OCR (1 << 3) /* ownership change request */ #define OHCI_SOC (3 << 16) /* scheduling overrun count */ /* * masks used with interrupt registers: * HcInterruptStatus (intrstatus) * HcInterruptEnable (intrenable) * HcInterruptDisable (intrdisable) */ #define OHCI_INTR_SO (1 << 0) /* scheduling overrun */ #define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */ #define OHCI_INTR_SF (1 << 2) /* start frame */ #define OHCI_INTR_RD (1 << 3) /* resume detect */ #define OHCI_INTR_UE (1 << 4) /* unrecoverable error */ #define OHCI_INTR_FNO (1 << 5) /* frame number overflow */ #define OHCI_INTR_RHSC (1 << 6) /* root hub status change */ #define OHCI_INTR_OC (1 << 30) /* ownership change */ #define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */ /* OHCI ROOT HUB REGISTER MASKS */ /* roothub.portstatus [i] bits */ #define RH_PS_CCS 0x00000001 /* current connect status */ #define RH_PS_PES 0x00000002 /* port enable status*/ #define RH_PS_PSS 0x00000004 /* port suspend status */ #define RH_PS_POCI 0x00000008 /* port over current indicator */ #define RH_PS_PRS 0x00000010 /* port reset status */ #define RH_PS_PPS 0x00000100 /* port power status */ #define RH_PS_LSDA 0x00000200 /* low speed device attached */ #define RH_PS_CSC 0x00010000 /* connect status change */ #define RH_PS_PESC 0x00020000 /* port enable status change */ #define RH_PS_PSSC 0x00040000 /* port suspend status change */ #define RH_PS_OCIC 0x00080000 /* over current indicator change */ #define RH_PS_PRSC 0x00100000 /* port reset status change */ /* roothub.status bits */ #define RH_HS_LPS 0x00000001 /* local power status */ #define RH_HS_OCI 0x00000002 /* over current indicator */ #define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ #define RH_HS_LPSC 0x00010000 /* local power status change */ #define RH_HS_OCIC 0x00020000 /* over current indicator change */ #define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ /* roothub.b masks */ #define RH_B_DR 0x0000ffff /* device removable flags */ #define RH_B_PPCM 0xffff0000 /* port power control mask */ /* roothub.a masks */ #define RH_A_NDP (0xff << 0) /* number of downstream ports */ #define RH_A_PSM (1 << 8) /* power switching mode */ #define RH_A_NPS (1 << 9) /* no power switching */ #define RH_A_DT (1 << 10) /* device type (mbz) */ #define RH_A_OCPM (1 << 11) /* over current protection mode */ #define RH_A_NOCP (1 << 12) /* no over current protection */ #define RH_A_POTPGT (0xff << 24) /* power on to power good time */ /* hcd-private per-urb state */ typedef struct urb_priv { struct ed *ed; u16 length; // # tds in this request u16 td_cnt; // tds already serviced struct list_head pending; struct td *td [0]; // all TDs in this request } urb_priv_t; #define TD_HASH_SIZE 64 /* power'o'two */ // sizeof (struct td) ~= 64 == 2^6 ... #define TD_HASH_FUNC(td_dma) ((td_dma ^ (td_dma >> 6)) % TD_HASH_SIZE) /* * This is the full ohci controller description * * Note how the "proper" USB information is just * a subset of what the full implementation needs. (Linus) */ struct ohci_hcd { spinlock_t lock; /* * I/O memory used to communicate with the HC (dma-consistent) */ struct ohci_regs __iomem *regs; /* * main memory used to communicate with the HC (dma-consistent). * hcd adds to schedule for a live hc any time, but removals finish * only at the start of the next frame. */ struct ohci_hcca *hcca; dma_addr_t hcca_dma; struct ed *ed_rm_list; /* to be removed */ struct ed *ed_bulktail; /* last in bulk list */ struct ed *ed_controltail; /* last in ctrl list */ struct ed *periodic [NUM_INTS]; /* shadow int_table */ /* * OTG controllers and transceivers need software interaction; * other external transceivers should be software-transparent */ struct otg_transceiver *transceiver; void (*start_hnp)(struct ohci_hcd *ohci); /* * memory management for queue data structures */ struct dma_pool *td_cache; struct dma_pool *ed_cache; struct td *td_hash [TD_HASH_SIZE]; struct list_head pending; /* * driver state */ int num_ports; int load [NUM_INTS]; u32 hc_control; /* copy of hc control reg */ unsigned long next_statechange; /* suspend/resume */ u32 fminterval; /* saved register */ unsigned autostop:1; /* rh auto stopping/stopped */ unsigned long flags; /* for HC bugs */ #define OHCI_QUIRK_AMD756 0x01 /* erratum #4 */ #define OHCI_QUIRK_SUPERIO 0x02 /* natsemi */ #define OHCI_QUIRK_INITRESET 0x04 /* SiS, OPTi, ... */ #define OHCI_QUIRK_BE_DESC 0x08 /* BE descriptors */ #define OHCI_QUIRK_BE_MMIO 0x10 /* BE registers */ #define OHCI_QUIRK_ZFMICRO 0x20 /* Compaq ZFMicro chipset*/ #define OHCI_QUIRK_NEC 0x40 /* lost interrupts */ #define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */ #define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ #define OHCI_QUIRK_AMD_ISO 0x200 /* ISO transfers*/ // there are also chip quirks/bugs in init logic struct work_struct nec_work; /* Worker for NEC quirk */ /* Needed for ZF Micro quirk */ struct timer_list unlink_watchdog; unsigned eds_scheduled; struct ed *ed_to_check; unsigned zf_delay; #ifdef DEBUG struct dentry *debug_dir; struct dentry *debug_async; struct dentry *debug_periodic; struct dentry *debug_registers; #endif }; #ifdef CONFIG_PCI static inline int quirk_nec(struct ohci_hcd *ohci) { return ohci->flags & OHCI_QUIRK_NEC; } static inline int quirk_zfmicro(struct ohci_hcd *ohci) { return ohci->flags & OHCI_QUIRK_ZFMICRO; } static inline int quirk_amdiso(struct ohci_hcd *ohci) { return ohci->flags & OHCI_QUIRK_AMD_ISO; } #else static inline int quirk_nec(struct ohci_hcd *ohci) { return 0; } static inline int quirk_zfmicro(struct ohci_hcd *ohci) { return 0; } static inline int quirk_amdiso(struct ohci_hcd *ohci) { return 0; } #endif /* convert between an hcd pointer and the corresponding ohci_hcd */ static inline struct ohci_hcd *hcd_to_ohci (struct usb_hcd *hcd) { return (struct ohci_hcd *) (hcd->hcd_priv); } static inline struct usb_hcd *ohci_to_hcd (const struct ohci_hcd *ohci) { return container_of ((void *) ohci, struct usb_hcd, hcd_priv); } /*-------------------------------------------------------------------------*/ #ifndef DEBUG #define STUB_DEBUG_FILES #endif /* DEBUG */ #define ohci_dbg(ohci, fmt, args...) \ dev_dbg (ohci_to_hcd(ohci)->self.controller , fmt , ## args ) #define ohci_err(ohci, fmt, args...) \ dev_err (ohci_to_hcd(ohci)->self.controller , fmt , ## args ) #define ohci_info(ohci, fmt, args...) \ dev_info (ohci_to_hcd(ohci)->self.controller , fmt , ## args ) #define ohci_warn(ohci, fmt, args...) \ dev_warn (ohci_to_hcd(ohci)->self.controller , fmt , ## args ) #ifdef OHCI_VERBOSE_DEBUG # define ohci_vdbg ohci_dbg #else # define ohci_vdbg(ohci, fmt, args...) do { } while (0) #endif /*-------------------------------------------------------------------------*/ /* * While most USB host controllers implement their registers and * in-memory communication descriptors in little-endian format, * a minority (notably the IBM STB04XXX and the Motorola MPC5200 * processors) implement them in big endian format. * * In addition some more exotic implementations like the Toshiba * Spider (aka SCC) cell southbridge are "mixed" endian, that is, * they have a different endianness for registers vs. in-memory * descriptors. * * This attempts to support either format at compile time without a * runtime penalty, or both formats with the additional overhead * of checking a flag bit. * * That leads to some tricky Kconfig rules howevber. There are * different defaults based on some arch/ppc platforms, though * the basic rules are: * * Controller type Kconfig options needed * --------------- ---------------------- * little endian CONFIG_USB_OHCI_LITTLE_ENDIAN * * fully big endian CONFIG_USB_OHCI_BIG_ENDIAN_DESC _and_ * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO * * mixed endian CONFIG_USB_OHCI_LITTLE_ENDIAN _and_ * CONFIG_USB_OHCI_BIG_ENDIAN_{MMIO,DESC} * * (If you have a mixed endian controller, you -must- also define * CONFIG_USB_OHCI_LITTLE_ENDIAN or things will not work when building * both your mixed endian and a fully big endian controller support in * the same kernel image). */ #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_DESC #ifdef CONFIG_USB_OHCI_LITTLE_ENDIAN #define big_endian_desc(ohci) (ohci->flags & OHCI_QUIRK_BE_DESC) #else #define big_endian_desc(ohci) 1 /* only big endian */ #endif #else #define big_endian_desc(ohci) 0 /* only little endian */ #endif #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO #ifdef CONFIG_USB_OHCI_LITTLE_ENDIAN #define big_endian_mmio(ohci) (ohci->flags & OHCI_QUIRK_BE_MMIO) #else #define big_endian_mmio(ohci) 1 /* only big endian */ #endif #else #define big_endian_mmio(ohci) 0 /* only little endian */ #endif /* * Big-endian read/write functions are arch-specific. * Other arches can be added if/when they're needed. * */ static inline unsigned int _ohci_readl (const struct ohci_hcd *ohci, __hc32 __iomem * regs) { #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO return big_endian_mmio(ohci) ? readl_be (regs) : readl (regs); #else return readl (regs); #endif } static inline void _ohci_writel (const struct ohci_hcd *ohci, const unsigned int val, __hc32 __iomem *regs) { #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO big_endian_mmio(ohci) ? writel_be (val, regs) : writel (val, regs); #else writel (val, regs); #endif } #ifdef CONFIG_ARCH_LH7A404 /* Marc Singer: at the time this code was written, the LH7A404 * had a problem reading the USB host registers. This * implementation of the ohci_readl function performs the read * twice as a work-around. */ #define ohci_readl(o,r) (_ohci_readl(o,r),_ohci_readl(o,r)) #define ohci_writel(o,v,r) _ohci_writel(o,v,r) #else #define ohci_readl(o,r) _ohci_readl(o,r) #define ohci_writel(o,v,r) _ohci_writel(o,v,r) #endif /*-------------------------------------------------------------------------*/ /* cpu to ohci */ static inline __hc16 cpu_to_hc16 (const struct ohci_hcd *ohci, const u16 x) { return big_endian_desc(ohci) ? (__force __hc16)cpu_to_be16(x) : (__force __hc16)cpu_to_le16(x); } static inline __hc16 cpu_to_hc16p (const struct ohci_hcd *ohci, const u16 *x) { return big_endian_desc(ohci) ? cpu_to_be16p(x) : cpu_to_le16p(x); } static inline __hc32 cpu_to_hc32 (const struct ohci_hcd *ohci, const u32 x) { return big_endian_desc(ohci) ? (__force __hc32)cpu_to_be32(x) : (__force __hc32)cpu_to_le32(x); } static inline __hc32 cpu_to_hc32p (const struct ohci_hcd *ohci, const u32 *x) { return big_endian_desc(ohci) ? cpu_to_be32p(x) : cpu_to_le32p(x); } /* ohci to cpu */ static inline u16 hc16_to_cpu (const struct ohci_hcd *ohci, const __hc16 x) { return big_endian_desc(ohci) ? be16_to_cpu((__force __be16)x) : le16_to_cpu((__force __le16)x); } static inline u16 hc16_to_cpup (const struct ohci_hcd *ohci, const __hc16 *x) { return big_endian_desc(ohci) ? be16_to_cpup((__force __be16 *)x) : le16_to_cpup((__force __le16 *)x); } static inline u32 hc32_to_cpu (const struct ohci_hcd *ohci, const __hc32 x) { return big_endian_desc(ohci) ? be32_to_cpu((__force __be32)x) : le32_to_cpu((__force __le32)x); } static inline u32 hc32_to_cpup (const struct ohci_hcd *ohci, const __hc32 *x) { return big_endian_desc(ohci) ? be32_to_cpup((__force __be32 *)x) : le32_to_cpup((__force __le32 *)x); } /*-------------------------------------------------------------------------*/ /* HCCA frame number is 16 bits, but is accessed as 32 bits since not all * hardware handles 16 bit reads. That creates a different confusion on * some big-endian SOC implementations. Same thing happens with PSW access. */ #ifdef CONFIG_PPC_MPC52xx #define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO) #else #define big_endian_frame_no_quirk(ohci) 0 #endif static inline u16 ohci_frame_no(const struct ohci_hcd *ohci) { u32 tmp; if (big_endian_desc(ohci)) { tmp = be32_to_cpup((__force __be32 *)&ohci->hcca->frame_no); if (!big_endian_frame_no_quirk(ohci)) tmp >>= 16; } else tmp = le32_to_cpup((__force __le32 *)&ohci->hcca->frame_no); return (u16)tmp; } static inline __hc16 *ohci_hwPSWp(const struct ohci_hcd *ohci, const struct td *td, int index) { return (__hc16 *)(big_endian_desc(ohci) ? &td->hwPSW[index ^ 1] : &td->hwPSW[index]); } static inline u16 ohci_hwPSW(const struct ohci_hcd *ohci, const struct td *td, int index) { return hc16_to_cpup(ohci, ohci_hwPSWp(ohci, td, index)); } /*-------------------------------------------------------------------------*/ static inline void disable (struct ohci_hcd *ohci) { ohci_to_hcd(ohci)->state = HC_STATE_HALT; } #define FI 0x2edf /* 12000 bits per frame (-1) */ #define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7)) #define FIT (1 << 31) #define LSTHRESH 0x628 /* lowspeed bit threshold */ static inline void periodic_reinit (struct ohci_hcd *ohci) { u32 fi = ohci->fminterval & 0x03fff; u32 fit = ohci_readl(ohci, &ohci->regs->fminterval) & FIT; ohci_writel (ohci, (fit ^ FIT) | ohci->fminterval, &ohci->regs->fminterval); ohci_writel (ohci, ((9 * fi) / 10) & 0x3fff, &ohci->regs->periodicstart); } /* AMD-756 (D2 rev) reports corrupt register contents in some cases. * The erratum (#4) description is incorrect. AMD's workaround waits * till some bits (mostly reserved) are clear; ok for all revs. */ #define read_roothub(hc, register, mask) ({ \ u32 temp = ohci_readl (hc, &hc->regs->roothub.register); \ if (temp == -1) \ disable (hc); \ else if (hc->flags & OHCI_QUIRK_AMD756) \ while (temp & mask) \ temp = ohci_readl (hc, &hc->regs->roothub.register); \ temp; }) static inline u32 roothub_a (struct ohci_hcd *hc) { return read_roothub (hc, a, 0xfc0fe000); } static inline u32 roothub_b (struct ohci_hcd *hc) { return ohci_readl (hc, &hc->regs->roothub.b); } static inline u32 roothub_status (struct ohci_hcd *hc) { return ohci_readl (hc, &hc->regs->roothub.status); } static inline u32 roothub_portstatus (struct ohci_hcd *hc, int i) { return read_roothub (hc, portstatus [i], 0xffe0fce0); } --- NEW FILE: ohci-hcd.c --- /* * OHCI HCD (Host Controller Driver) for USB. * * (C) Copyright 1999 Roman Weissgaerber <we...@vi...> * (C) Copyright 2000-2004 David Brownell <dbr...@us...> * * [ Initialisation is based on Linus' ] * [ uhci code and gregs ohci fragments ] * [ (C) Copyright 1999 Linus Torvalds ] * [ (C) Copyright 1999 Gregory P. Smith] * * * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller * interfaces (though some non-x86 Intel chips use it). It supports * smarter hardware than UHCI. A download link for the spec available * through the http://www.usb.org website. * * This file is licenced under the GPL. */ [...1202 lines suppressed...] #endif #ifdef SA1111_DRIVER sa1111_driver_unregister(&SA1111_DRIVER); #endif #ifdef OF_PLATFORM_DRIVER of_unregister_platform_driver(&OF_PLATFORM_DRIVER); #endif #ifdef PLATFORM_DRIVER platform_driver_unregister(&PLATFORM_DRIVER); #endif #ifdef PS3_SYSTEM_BUS_DRIVER ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER); #endif #ifdef DEBUG debugfs_remove(ohci_debug_root); #endif clear_bit(USB_OHCI_LOADED, &usb_hcds_loaded); } module_exit(ohci_hcd_mod_exit); --- NEW FILE: ehci-hcd.c --- /* * Copyright (c) 2000-2004 by David Brownell * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/module.h> [...1139 lines suppressed...] { #ifdef OF_PLATFORM_DRIVER of_unregister_platform_driver(&OF_PLATFORM_DRIVER); #endif #ifdef PLATFORM_DRIVER platform_driver_unregister(&PLATFORM_DRIVER); #endif #ifdef PCI_DRIVER pci_unregister_driver(&PCI_DRIVER); #endif #ifdef PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER); #endif #ifdef DEBUG debugfs_remove(ehci_debug_root); #endif clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded); } module_exit(ehci_hcd_cleanup); |
From: Albert H. <he...@us...> - 2009-10-25 18:45:46
|
Update of /cvsroot/gc-linux/linux/fs In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/fs Modified Files: Kconfig Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/fs/Makefile,v retrieving revision 1.14 retrieving revision 1.15 diff -C2 -d -r1.14 -r1.15 *** Makefile 5 Mar 2009 19:58:47 -0000 1.14 --- Makefile 25 Oct 2009 18:45:36 -0000 1.15 *************** *** 12,16 **** seq_file.o xattr.o libfs.o fs-writeback.o \ pnode.o drop_caches.o splice.o sync.o utimes.o \ ! stack.o ifeq ($(CONFIG_BLOCK),y) --- 12,16 ---- seq_file.o xattr.o libfs.o fs-writeback.o \ pnode.o drop_caches.o splice.o sync.o utimes.o \ ! stack.o fs_struct.o ifeq ($(CONFIG_BLOCK),y) *************** *** 52,60 **** obj-$(CONFIG_GENERIC_ACL) += generic_acl.o ! obj-$(CONFIG_QUOTA) += dquot.o ! obj-$(CONFIG_QFMT_V1) += quota_v1.o ! obj-$(CONFIG_QFMT_V2) += quota_v2.o ! obj-$(CONFIG_QUOTA_TREE) += quota_tree.o ! obj-$(CONFIG_QUOTACTL) += quota.o obj-$(CONFIG_PROC_FS) += proc/ --- 52,56 ---- obj-$(CONFIG_GENERIC_ACL) += generic_acl.o ! obj-y += quota/ obj-$(CONFIG_PROC_FS) += proc/ *************** *** 68,71 **** --- 64,68 ---- # Do not add any filesystems before this line + obj-$(CONFIG_FSCACHE) += fscache/ obj-$(CONFIG_REISERFS_FS) += reiserfs/ obj-$(CONFIG_EXT3_FS) += ext3/ # Before ext2 so root fs can be ext3 *************** *** 118,126 **** --- 115,126 ---- obj-$(CONFIG_9P_FS) += 9p/ obj-$(CONFIG_AFS_FS) += afs/ + obj-$(CONFIG_NILFS2_FS) += nilfs2/ obj-$(CONFIG_BEFS_FS) += befs/ obj-$(CONFIG_HOSTFS) += hostfs/ obj-$(CONFIG_HPPFS) += hppfs/ + obj-$(CONFIG_CACHEFILES) += cachefiles/ obj-$(CONFIG_DEBUG_FS) += debugfs/ obj-$(CONFIG_OCFS2_FS) += ocfs2/ obj-$(CONFIG_BTRFS_FS) += btrfs/ obj-$(CONFIG_GFS2_FS) += gfs2/ + obj-$(CONFIG_EXOFS_FS) += exofs/ Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/fs/Kconfig,v retrieving revision 1.15 retrieving revision 1.16 diff -C2 -d -r1.15 -r1.16 *** Kconfig 2 Mar 2009 19:26:37 -0000 1.15 --- Kconfig 25 Oct 2009 18:45:36 -0000 1.16 *************** *** 57,115 **** source "fs/notify/Kconfig" ! config QUOTA ! bool "Quota support" ! help ! If you say Y here, you will be able to set per user limits for disk ! usage (also called disk quotas). Currently, it works for the ! ext2, ext3, and reiserfs file system. ext3 also supports journalled ! quotas for which you don't need to run quotacheck(8) after an unclean ! shutdown. ! For further details, read the Quota mini-HOWTO, available from ! <http://www.tldp.org/docs.html#howto>, or the documentation provided ! with the quota tools. Probably the quota support is only useful for ! multi user systems. If unsure, say N. ! ! config QUOTA_NETLINK_INTERFACE ! bool "Report quota messages through netlink interface" ! depends on QUOTA && NET ! help ! If you say Y here, quota warnings (about exceeding softlimit, reaching ! hardlimit, etc.) will be reported through netlink interface. If unsure, ! say Y. ! ! config PRINT_QUOTA_WARNING ! bool "Print quota warnings to console (OBSOLETE)" ! depends on QUOTA ! default y ! help ! If you say Y here, quota warnings (about exceeding softlimit, reaching ! hardlimit, etc.) will be printed to the process' controlling terminal. ! Note that this behavior is currently deprecated and may go away in ! future. Please use notification via netlink socket instead. ! ! # Generic support for tree structured quota files. Seleted when needed. ! config QUOTA_TREE ! tristate ! ! config QFMT_V1 ! tristate "Old quota format support" ! depends on QUOTA ! help ! This quota format was (is) used by kernels earlier than 2.4.22. If ! you have quota working and you don't want to convert to new quota ! format say Y here. ! ! config QFMT_V2 ! tristate "Quota format v2 support" ! depends on QUOTA ! select QUOTA_TREE ! help ! This quota format allows using quotas with 32-bit UIDs/GIDs. If you ! need this functionality say Y here. ! ! config QUOTACTL ! bool ! depends on XFS_QUOTA || QUOTA ! default y source "fs/autofs/Kconfig" --- 57,61 ---- source "fs/notify/Kconfig" ! source "fs/quota/Kconfig" source "fs/autofs/Kconfig" *************** *** 121,124 **** --- 67,77 ---- select FS_POSIX_ACL + menu "Caches" + + source "fs/fscache/Kconfig" + source "fs/cachefiles/Kconfig" + + endmenu + if BLOCK menu "CD-ROM/DVD Filesystems" *************** *** 223,226 **** --- 176,206 ---- source "fs/sysv/Kconfig" source "fs/ufs/Kconfig" + source "fs/exofs/Kconfig" + + config NILFS2_FS + tristate "NILFS2 file system support (EXPERIMENTAL)" + depends on BLOCK && EXPERIMENTAL + select CRC32 + help + NILFS2 is a log-structured file system (LFS) supporting continuous + snapshotting. In addition to versioning capability of the entire + file system, users can even restore files mistakenly overwritten or + destroyed just a few seconds ago. Since this file system can keep + consistency like conventional LFS, it achieves quick recovery after + system crashes. + + NILFS2 creates a number of checkpoints every few seconds or per + synchronous write basis (unless there is no change). Users can + select significant versions among continuously created checkpoints, + and can change them into snapshots which will be preserved for long + periods until they are changed back to checkpoints. Each + snapshot is mountable as a read-only file system concurrently with + its writable mount, and this feature is convenient for online backup. + + Some features including atime, extended attributes, and POSIX ACLs, + are not supported yet. + + To compile this file system support as a module, choose M here: the + module will be called nilfs2. If unsure, say N. endif # MISC_FILESYSTEMS |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/drivers/video In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/video Modified Files: Kconfig Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/video/Makefile,v retrieving revision 1.31 retrieving revision 1.32 diff -C2 -d -r1.31 -r1.32 *** Makefile 25 Oct 2009 18:33:47 -0000 1.31 --- Makefile 25 Oct 2009 18:45:36 -0000 1.32 *************** *** 57,61 **** obj-$(CONFIG_FB_FM2) += fm2fb.o obj-$(CONFIG_FB_VT8623) += vt8623fb.o - obj-$(CONFIG_FB_CYBLA) += cyblafb.o obj-$(CONFIG_FB_TRIDENT) += tridentfb.o obj-$(CONFIG_FB_LE80578) += vermilion/ --- 57,60 ---- *************** *** 77,80 **** --- 76,80 ---- obj-$(CONFIG_FB_MAC) += macfb.o obj-$(CONFIG_FB_HECUBA) += hecubafb.o + obj-$(CONFIG_FB_N411) += n411.o obj-$(CONFIG_FB_HGA) += hgafb.o obj-$(CONFIG_FB_XVR500) += sunxvr500.o *************** *** 107,113 **** --- 107,115 ---- obj-$(CONFIG_FB_MAXINE) += maxinefb.o obj-$(CONFIG_FB_METRONOME) += metronomefb.o + obj-$(CONFIG_FB_BROADSHEET) += broadsheetfb.o obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o obj-$(CONFIG_FB_SH7760) += sh7760fb.o obj-$(CONFIG_FB_IMX) += imxfb.o + obj-$(CONFIG_FB_S3C) += s3c-fb.o obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o obj-$(CONFIG_FB_FSL_DIU) += fsl-diu-fb.o *************** *** 133,137 **** obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o ! obj-$(CONFIG_FB_MX3) += mx3fb.o # the test framebuffer is last --- 135,139 ---- obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o ! obj-$(CONFIG_FB_MX3) += mx3fb.o # the test framebuffer is last Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/video/Kconfig,v retrieving revision 1.35 retrieving revision 1.36 diff -C2 -d -r1.35 -r1.36 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.35 --- Kconfig 25 Oct 2009 18:45:36 -0000 1.36 *************** *** 398,402 **** config FB_IMX tristate "Motorola i.MX LCD support" ! depends on FB && ARM && ARCH_IMX select FB_CFB_FILLRECT select FB_CFB_COPYAREA --- 398,402 ---- config FB_IMX tristate "Motorola i.MX LCD support" ! depends on FB && (ARCH_IMX || ARCH_MX2) select FB_CFB_FILLRECT select FB_CFB_COPYAREA *************** *** 1129,1139 **** Say Y if you have and plan to use such a board. - If you say Y here and want DDC/I2C support you must first say Y to - "I2C support" and "I2C bit-banging support" in the character devices - section. - - If you say M here then "I2C support" and "I2C bit-banging support" - can be build either as modules or built-in. - To compile this driver as a module, choose M here: the module will be called intelfb. --- 1129,1132 ---- *************** *** 1208,1216 **** different from 8. ! If you need support for G400 secondary head, you must first say Y to ! "I2C support" in the character devices section, and then to ! "Matrox I2C support" and "G400 second head support" here in the ! framebuffer section. G450/G550 secondary head and digital output ! are supported without additional modules. The driver starts in monitor mode. You must use the matroxset tool --- 1201,1208 ---- different from 8. ! If you need support for G400 secondary head, you must say Y to ! "Matrox I2C support" and "G400 second head support" right below. ! G450/G550 secondary head and digital output are supported without ! additional modules. The driver starts in monitor mode. You must use the matroxset tool *************** *** 1311,1321 **** don't need to choose this to run the Radeon in plain VGA mode. - If you say Y here and want DDC/I2C support you must first say Y to - "I2C support" and "I2C bit-banging support" in the character devices - section. - - If you say M here then "I2C support" and "I2C bit-banging support" - can be build either as modules or built-in. - There is a product page at http://apps.ati.com/ATIcompare/ --- 1303,1306 ---- *************** *** 1551,1554 **** --- 1536,1540 ---- select FB_CFB_FILLRECT select FB_CFB_COPYAREA + select FB_MODE_HELPERS help This driver supports graphics boards with the 3Dfx Banshee, *************** *** 1566,1569 **** --- 1552,1563 ---- device driver with acceleration functions. + config FB_3DFX_I2C + bool "Enable DDC/I2C support" + depends on FB_3DFX && EXPERIMENTAL + select FB_DDC + default y + help + Say Y here if you want DDC/I2C support for your 3dfx Voodoo3. + config FB_VOODOO1 tristate "3Dfx Voodoo Graphics (sst1) support" *************** *** 1598,1627 **** VIA VT8623 [Apollo CLE266] chipset. - config FB_CYBLA - tristate "Cyberblade/i1 support" - depends on FB && PCI && X86_32 && !64BIT - select FB_CFB_IMAGEBLIT - ---help--- - This driver is supposed to support the Trident Cyberblade/i1 - graphics core integrated in the VIA VT8601A North Bridge, - also known as VIA Apollo PLE133. - - Status: - - Developed, tested and working on EPIA 5000 and EPIA 800. - - Does work reliable on all systems with CRT/LCD connected to - normal VGA ports. - - Should work on systems that do use the internal LCD port, but - this is absolutely not tested. - - Character imageblit, copyarea and rectangle fill are hw accelerated, - ypan scrolling is used by default. - - Please do read <file:Documentation/fb/cyblafb/*>. - - To compile this driver as a module, choose M here: the - module will be called cyblafb. - config FB_TRIDENT ! tristate "Trident support" depends on FB && PCI select FB_CFB_FILLRECT --- 1592,1597 ---- VIA VT8623 [Apollo CLE266] chipset. config FB_TRIDENT ! tristate "Trident/CyberXXX/CyberBlade support" depends on FB && PCI select FB_CFB_FILLRECT *************** *** 1634,1639 **** There are also integrated versions of these chips called CyberXXXX, CyberImage or CyberBlade. These chips are mostly found in laptops ! but also on some motherboards. For more information, read ! <file:Documentation/fb/tridentfb.txt> Say Y if you have such a graphics board. --- 1604,1609 ---- There are also integrated versions of these chips called CyberXXXX, CyberImage or CyberBlade. These chips are mostly found in laptops ! but also on some motherboards including early VIA EPIA motherboards. ! For more information, read <file:Documentation/fb/tridentfb.txt> Say Y if you have such a graphics board. *************** *** 1642,1652 **** module will be called tridentfb. - config FB_TRIDENT_ACCEL - bool "Trident Acceleration functions (EXPERIMENTAL)" - depends on FB_TRIDENT && EXPERIMENTAL - ---help--- - This will compile the Trident frame buffer device with - acceleration functions. - config FB_ARK tristate "ARK 2000PV support" --- 1612,1615 ---- *************** *** 1921,1924 **** --- 1884,1911 ---- default y + config FB_S3C + tristate "Samsung S3C framebuffer support" + depends on FB && ARCH_S3C64XX + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + ---help--- + Frame buffer driver for the built-in FB controller in the Samsung + SoC line from the S3C2443 onwards, including the S3C2416, S3C2450, + and the S3C64XX series such as the S3C6400 and S3C6410. + + These chips all have the same basic framebuffer design with the + actual capabilities depending on the chip. For instance the S3C6400 + and S3C6410 support 4 hardware windows whereas the S3C24XX series + currently only have two. + + Currently the support is only for the S3C6400 and S3C6410 SoCs. + + config FB_S3C_DEBUG_REGWRITE + bool "Debug register writes" + depends on FB_S3C + ---help--- + Show all register writes via printk(KERN_DEBUG) + config FB_S3C2410 tristate "S3C2410 LCD framebuffer support" *************** *** 2121,2134 **** config FB_MX3 ! tristate "MX3 Framebuffer support" ! depends on FB && MX3_IPU ! select FB_CFB_FILLRECT ! select FB_CFB_COPYAREA ! select FB_CFB_IMAGEBLIT ! default y ! help ! This is a framebuffer device for the i.MX31 LCD Controller. So ! far only synchronous displays are supported. If you plan to use ! an LCD display with your i.MX31 system, say Y here. source "drivers/video/omap/Kconfig" --- 2108,2135 ---- config FB_MX3 ! tristate "MX3 Framebuffer support" ! depends on FB && MX3_IPU ! select FB_CFB_FILLRECT ! select FB_CFB_COPYAREA ! select FB_CFB_IMAGEBLIT ! default y ! help ! This is a framebuffer device for the i.MX31 LCD Controller. So ! far only synchronous displays are supported. If you plan to use ! an LCD display with your i.MX31 system, say Y here. ! ! config FB_BROADSHEET ! tristate "E-Ink Broadsheet/Epson S1D13521 controller support" ! depends on FB ! select FB_SYS_FILLRECT ! select FB_SYS_COPYAREA ! select FB_SYS_IMAGEBLIT ! select FB_SYS_FOPS ! select FB_DEFERRED_IO ! help ! This driver implements support for the E-Ink Broadsheet ! controller. The release name for this device was Epson S1D13521 ! and could also have been called by other names when coupled with ! a bridge adapter. source "drivers/video/omap/Kconfig" |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/drivers/input/keyboard In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/input/keyboard Modified Files: Kconfig Log Message: Forward to v.2.6.30. Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/input/keyboard/Kconfig,v retrieving revision 1.11 retrieving revision 1.12 diff -C2 -d -r1.11 -r1.12 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.11 --- Kconfig 25 Oct 2009 18:45:35 -0000 1.12 *************** *** 14,22 **** config KEYBOARD_ATKBD ! tristate "AT keyboard" if EMBEDDED || !X86_PC default y select SERIO select SERIO_LIBPS2 ! select SERIO_I8042 if X86_PC select SERIO_GSCPS2 if GSC help --- 14,22 ---- config KEYBOARD_ATKBD ! tristate "AT keyboard" if EMBEDDED || !X86 default y select SERIO select SERIO_LIBPS2 ! select SERIO_I8042 if X86 select SERIO_GSCPS2 if GSC help |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/drivers/net In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/net Modified Files: Kconfig Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/net/Makefile,v retrieving revision 1.33 retrieving revision 1.34 diff -C2 -d -r1.33 -r1.34 *** Makefile 25 Oct 2009 18:33:47 -0000 1.33 --- Makefile 25 Oct 2009 18:45:35 -0000 1.34 *************** *** 7,10 **** --- 7,11 ---- obj-$(CONFIG_IBM_NEW_EMAC) += ibm_newemac/ obj-$(CONFIG_IGB) += igb/ + obj-$(CONFIG_IGBVF) += igbvf/ obj-$(CONFIG_IXGBE) += ixgbe/ obj-$(CONFIG_IXGB) += ixgb/ *************** *** 27,35 **** gianfar_driver-objs := gianfar.o \ gianfar_ethtool.o \ - gianfar_mii.o \ gianfar_sysfs.o obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o ! ucc_geth_driver-objs := ucc_geth.o ucc_geth_mii.o ucc_geth_ethtool.o # --- 28,37 ---- gianfar_driver-objs := gianfar.o \ gianfar_ethtool.o \ gianfar_sysfs.o obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o ! ucc_geth_driver-objs := ucc_geth.o ucc_geth_ethtool.o ! ! obj-$(CONFIG_FSL_PQ_MDIO) += fsl_pq_mdio.o # *************** *** 101,105 **** obj-$(CONFIG_SEEQ8005) += seeq8005.o obj-$(CONFIG_NET_SB1000) += sb1000.o ! obj-$(CONFIG_MAC8390) += mac8390.o 8390.o obj-$(CONFIG_APNE) += apne.o 8390.o obj-$(CONFIG_PCMCIA_PCNET) += 8390.o --- 103,107 ---- obj-$(CONFIG_SEEQ8005) += seeq8005.o obj-$(CONFIG_NET_SB1000) += sb1000.o ! obj-$(CONFIG_MAC8390) += mac8390.o obj-$(CONFIG_APNE) += apne.o 8390.o obj-$(CONFIG_PCMCIA_PCNET) += 8390.o *************** *** 220,223 **** --- 222,226 ---- obj-$(CONFIG_IBMVETH) += ibmveth.o obj-$(CONFIG_S2IO) += s2io.o + obj-$(CONFIG_VXGE) += vxge/ obj-$(CONFIG_MYRI10GE) += myri10ge/ obj-$(CONFIG_SMC91X) += smc91x.o *************** *** 230,233 **** --- 233,237 ---- obj-$(CONFIG_MLX4_CORE) += mlx4/ obj-$(CONFIG_ENC28J60) += enc28j60.o + obj-$(CONFIG_ETHOC) += ethoc.o obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/net/Kconfig,v retrieving revision 1.39 retrieving revision 1.40 diff -C2 -d -r1.39 -r1.40 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.39 --- Kconfig 25 Oct 2009 18:45:35 -0000 1.40 *************** *** 27,30 **** --- 27,39 ---- if NETDEVICES + config COMPAT_NET_DEV_OPS + default y + bool "Enable older network device API compatibility" + ---help--- + This option enables kernel compatibility with older network devices + that do not use net_device_ops interface. + + If unsure, say Y. + config IFB tristate "Intermediate Functional Block support" *************** *** 964,967 **** --- 973,986 ---- If unsure, say N. + config ETHOC + tristate "OpenCores 10/100 Mbps Ethernet MAC support" + depends on NET_ETHERNET && HAS_IOMEM + select MII + select PHYLIB + select CRC32 + select BITREVERSE + help + Say Y here if you want to use the OpenCores 10/100 Mbps Ethernet MAC. + config SMC911X tristate "SMSC LAN911[5678] support" *************** *** 1841,1848 **** config FEC bool "FEC ethernet controller (of ColdFire CPUs)" ! depends on M523x || M527x || M5272 || M528x || M520x || M532x help Say Y here if you want to use the built-in 10/100 Fast ethernet ! controller on some Motorola ColdFire processors. config FEC2 --- 1860,1867 ---- config FEC bool "FEC ethernet controller (of ColdFire CPUs)" ! depends on M523x || M527x || M5272 || M528x || M520x || M532x || MACH_MX27 help Say Y here if you want to use the built-in 10/100 Fast ethernet ! controller on some Motorola ColdFire and Freescale i.MX processors. config FEC2 *************** *** 2031,2043 **** will be called igb. - config IGB_LRO - bool "Use software LRO" - depends on IGB && INET - select INET_LRO - ---help--- - Say Y here if you want to use large receive offload. - - If in doubt, say N. - config IGB_DCA bool "Direct Cache Access (DCA) Support" --- 2050,2053 ---- *************** *** 2049,2052 **** --- 2059,2083 ---- is used, with the intent of lessening the impact of cache misses. + config IGBVF + tristate "Intel(R) 82576 Virtual Function Ethernet support" + depends on PCI + ---help--- + This driver supports Intel(R) 82576 virtual functions. For more + information on how to identify your adapter, go to the Adapter & + Driver ID Guide at: + + <http://support.intel.com/support/network/adapter/pro100/21397.htm> + + For general information and support, go to the Intel support + website at: + + <http://support.intel.com> + + More specific information on configuring the driver is in + <file:Documentation/networking/e1000.txt>. + + To compile this driver as a module, choose M here. The module + will be called igbvf. + source "drivers/net/ixp2000/Kconfig" *************** *** 2227,2231 **** depends on PCI select CRC32 ! select ZLIB_INFLATE help This driver supports Broadcom NetXtremeII gigabit Ethernet cards. --- 2258,2262 ---- depends on PCI select CRC32 ! select FW_LOADER help This driver supports Broadcom NetXtremeII gigabit Ethernet cards. *************** *** 2285,2291 **** --- 2316,2330 ---- If unsure, say N. + config FSL_PQ_MDIO + tristate "Freescale PQ MDIO" + depends on FSL_SOC + select PHYLIB + help + This driver supports the MDIO bus used by the gianfar and UCC drivers. + config GIANFAR tristate "Gianfar Ethernet" depends on FSL_SOC + select FSL_PQ_MDIO select PHYLIB select CRC32 *************** *** 2297,2300 **** --- 2336,2340 ---- tristate "Freescale QE Gigabit Ethernet" depends on QUICC_ENGINE + select FSL_PQ_MDIO select PHYLIB help *************** *** 2313,2316 **** --- 2353,2357 ---- tristate "Marvell Discovery (643XX) and Orion ethernet support" depends on MV64360 || MV64X60 || (PPC_MULTIPLATFORM && PPC32) || PLAT_ORION + select INET_LRO select PHYLIB help *************** *** 2431,2435 **** depends on CHELSIO_T3_DEPENDS select FW_LOADER - select INET_LRO help This driver supports Chelsio T3-based gigabit and 10Gb Ethernet --- 2472,2475 ---- *************** *** 2467,2471 **** tristate "Intel(R) 10GbE PCI Express adapters support" depends on PCI && INET - select INET_LRO ---help--- This driver supports Intel(R) 10GbE PCI Express family of --- 2507,2510 ---- *************** *** 2532,2535 **** --- 2571,2591 ---- <file:Documentation/networking/s2io.txt>. + config VXGE + tristate "Neterion X3100 Series 10GbE PCIe Server Adapter" + depends on PCI && INET + ---help--- + This driver supports Neterion Inc's X3100 Series 10 GbE PCIe + I/O Virtualized Server Adapter. + More specific information on configuring the driver is in + <file:Documentation/networking/vxge.txt>. + + config VXGE_DEBUG_TRACE_ALL + bool "Enabling All Debug trace statments in driver" + default n + depends on VXGE + ---help--- + Say Y here if you want to enabling all the debug trace statements in + driver. By default only few debug trace statements are enabled. + config MYRI10GE tristate "Myricom Myri-10G Ethernet support" |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/kernel In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/kernel Added Files: kexec.c Log Message: Forward to v.2.6.30. --- NEW FILE: kexec.c --- /* * kexec.c - kexec system call * Copyright (C) 2002-2004 Eric Biederman <ebi...@xm...> * * This source code is licensed under the GNU General Public License, * Version 2. See the file COPYING for more details. */ #include <linux/capability.h> #include <linux/mm.h> #include <linux/file.h> #include <linux/slab.h> #include <linux/fs.h> #include <linux/kexec.h> #include <linux/mutex.h> #include <linux/list.h> #include <linux/highmem.h> #include <linux/syscalls.h> #include <linux/reboot.h> [...1465 lines suppressed...] Enable_irqs: local_irq_enable(); Enable_cpus: enable_nonboot_cpus(); device_power_up(PMSG_RESTORE); Resume_devices: device_resume(PMSG_RESTORE); Resume_console: resume_console(); thaw_processes(); Restore_console: pm_restore_console(); mutex_unlock(&pm_mutex); } #endif Unlock: mutex_unlock(&kexec_mutex); return error; } |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/sound/ppc In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/sound/ppc Modified Files: Kconfig Log Message: Forward to v.2.6.30. Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/sound/ppc/Kconfig,v retrieving revision 1.18 retrieving revision 1.19 diff -C2 -d -r1.18 -r1.19 *** Kconfig 25 Oct 2009 18:33:48 -0000 1.18 --- Kconfig 25 Oct 2009 18:45:36 -0000 1.19 *************** *** 14,17 **** --- 14,18 ---- depends on I2C && INPUT && PPC_PMAC select SND_PCM + select SND_VMASTER help Say Y here to include support for the integrated sound device. |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/drivers/misc In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/misc Modified Files: Kconfig Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/misc/Makefile,v retrieving revision 1.12 retrieving revision 1.13 diff -C2 -d -r1.12 -r1.13 *** Makefile 25 Oct 2009 18:33:47 -0000 1.12 --- Makefile 25 Oct 2009 18:45:35 -0000 1.13 *************** *** 19,22 **** --- 19,23 ---- obj-$(CONFIG_SGI_GRU) += sgi-gru/ obj-$(CONFIG_HP_ILO) += hpilo.o + obj-$(CONFIG_ISL29003) += isl29003.o obj-$(CONFIG_C2PORT) += c2port/ obj-y += eeprom/ Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/misc/Kconfig,v retrieving revision 1.16 retrieving revision 1.17 diff -C2 -d -r1.16 -r1.17 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.16 --- Kconfig 25 Oct 2009 18:45:35 -0000 1.17 *************** *** 19,24 **** help This option enables device driver support for the PWM channels ! on certain Atmel prcoessors. Pulse Width Modulation is used for ! purposes including software controlled power-efficent backlights on LCD displays, motor control, and waveform generation. --- 19,24 ---- help This option enables device driver support for the PWM channels ! on certain Atmel processors. Pulse Width Modulation is used for ! purposes including software controlled power-efficient backlights on LCD displays, motor control, and waveform generation. *************** *** 143,147 **** depends on AVR32 || ARCH_AT91 ---help--- ! This option enables device driver support for Atmel Syncronized Serial Communication peripheral (SSC). --- 143,147 ---- depends on AVR32 || ARCH_AT91 ---help--- ! This option enables device driver support for Atmel Synchronized Serial Communication peripheral (SSC). *************** *** 163,170 **** tristate "Support communication between SGI SSIs" depends on NET ! depends on (IA64_GENERIC || IA64_SGI_SN2 || IA64_SGI_UV || X86_64) && SMP select IA64_UNCACHED_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2 select GENERIC_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2 ! select SGI_GRU if (IA64_GENERIC || IA64_SGI_UV || X86_64) && SMP ---help--- An SGI machine can be divided into multiple Single System --- 163,170 ---- tristate "Support communication between SGI SSIs" depends on NET ! depends on (IA64_GENERIC || IA64_SGI_SN2 || IA64_SGI_UV || X86_UV) && SMP select IA64_UNCACHED_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2 select GENERIC_ALLOCATOR if IA64_GENERIC || IA64_SGI_SN2 ! select SGI_GRU if X86_64 && SMP ---help--- An SGI machine can be divided into multiple Single System *************** *** 190,194 **** config SGI_GRU tristate "SGI GRU driver" ! depends on (X86_64 || IA64_SGI_UV || IA64_GENERIC) && SMP default n select MMU_NOTIFIER --- 190,194 ---- config SGI_GRU tristate "SGI GRU driver" ! depends on X86_UV && SMP default n select MMU_NOTIFIER *************** *** 224,227 **** --- 224,237 ---- laptops. + config ISL29003 + tristate "Intersil ISL29003 ambient light sensor" + depends on I2C && SYSFS + help + If you say yes here you get support for the Intersil ISL29003 + ambient light sensor. + + This driver can also be built as a module. If so, the module + will be called isl29003. + source "drivers/misc/c2port/Kconfig" source "drivers/misc/eeprom/Kconfig" |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/drivers/gpio In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/gpio Modified Files: gpiolib.c Log Message: Forward to v.2.6.30. Index: gpiolib.c =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/gpio/gpiolib.c,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** gpiolib.c 25 Oct 2009 18:33:47 -0000 1.3 --- gpiolib.c 25 Oct 2009 18:45:35 -0000 1.4 *************** *** 70,80 **** * message should motivate switching to explicit requests... so should * the weaker cleanup after faults, compared to gpio_request(). */ static int gpio_ensure_requested(struct gpio_desc *desc, unsigned offset) { ! if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { ! struct gpio_chip *chip = desc->chip; ! int gpio = chip->base + offset; if (!try_module_get(chip->owner)) { pr_err("GPIO-%d: module can't be gotten \n", gpio); --- 70,85 ---- * message should motivate switching to explicit requests... so should * the weaker cleanup after faults, compared to gpio_request(). + * + * NOTE: the autorequest mechanism is going away; at this point it's + * only "legal" in the sense that (old) code using it won't break yet, + * but instead only triggers a WARN() stack dump. */ static int gpio_ensure_requested(struct gpio_desc *desc, unsigned offset) { ! const struct gpio_chip *chip = desc->chip; ! const int gpio = chip->base + offset; + if (WARN(test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0, + "autorequest GPIO-%d\n", gpio)) { if (!try_module_get(chip->owner)) { pr_err("GPIO-%d: module can't be gotten \n", gpio); *************** *** 83,87 **** return -EIO; } - pr_warning("GPIO-%d autorequested\n", gpio); desc_set_label(desc, "[auto]"); /* caller must chip->request() w/o spinlock */ --- 88,91 ---- *************** *** 439,442 **** --- 443,447 ---- struct gpio_desc *desc; int status = -EINVAL; + char *ioname = NULL; /* can't export until sysfs is available ... */ *************** *** 462,470 **** spin_unlock_irqrestore(&gpio_lock, flags); if (status == 0) { struct device *dev; dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), ! desc, "gpio%d", gpio); if (dev) { if (direction_may_change) --- 467,478 ---- spin_unlock_irqrestore(&gpio_lock, flags); + if (desc->chip->names && desc->chip->names[gpio - desc->chip->base]) + ioname = desc->chip->names[gpio - desc->chip->base]; + if (status == 0) { struct device *dev; dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), ! desc, ioname ? ioname : "gpio%d", gpio); if (dev) { if (direction_may_change) *************** *** 514,517 **** --- 522,526 ---- desc = &gpio_desc[gpio]; + if (test_bit(FLAG_EXPORT, &desc->flags)) { struct device *dev = NULL; |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/arch/powerpc/kernel In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/arch/powerpc/kernel Modified Files: cputable.c head_32.S udbg.c Added Files: dma.c Log Message: Forward to v.2.6.30. Index: udbg.c =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/kernel/udbg.c,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** udbg.c 25 Oct 2009 18:33:46 -0000 1.5 --- udbg.c 25 Oct 2009 18:45:35 -0000 1.6 *************** *** 19,22 **** --- 19,23 ---- void (*udbg_putc)(char c); + void (*udbg_flush)(void); int (*udbg_getc)(void); int (*udbg_getc_poll)(void); *************** *** 77,80 **** --- 78,84 ---- udbg_putc(c); } + + if (udbg_flush) + udbg_flush(); } #if 0 *************** *** 99,102 **** --- 103,109 ---- } + if (udbg_flush) + udbg_flush(); + return n - remain; } --- NEW FILE: dma.c --- /* * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation * * Provide default implementations of the DMA mapping callbacks for * directly mapped busses. */ #include <linux/device.h> #include <linux/dma-mapping.h> #include <asm/bug.h> #include <asm/abs_addr.h> /* * Generic direct DMA implementation * * This implementation supports a per-device offset that can be applied if * the address at which memory is visible to devices is not 0. Platform code * can set archdata.dma_data to an unsigned long holding the offset. By * default the offset is PCI_DRAM_OFFSET. */ static unsigned long get_dma_direct_offset(struct device *dev) { if (dev) return (unsigned long)dev->archdata.dma_data; return PCI_DRAM_OFFSET; } void *dma_direct_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag) { void *ret; #ifdef CONFIG_NOT_COHERENT_CACHE ret = __dma_alloc_coherent(dev, size, dma_handle, flag); if (ret == NULL) return NULL; *dma_handle += get_dma_direct_offset(dev); return ret; #else struct page *page; int node = dev_to_node(dev); /* ignore region specifiers */ flag &= ~(__GFP_HIGHMEM); page = alloc_pages_node(node, flag, get_order(size)); if (page == NULL) return NULL; ret = page_address(page); memset(ret, 0, size); *dma_handle = virt_to_abs(ret) + get_dma_direct_offset(dev); return ret; #endif } void dma_direct_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle) { #ifdef CONFIG_NOT_COHERENT_CACHE __dma_free_coherent(size, vaddr); #else free_pages((unsigned long)vaddr, get_order(size)); #endif } static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, enum dma_data_direction direction, struct dma_attrs *attrs) { struct scatterlist *sg; int i; for_each_sg(sgl, sg, nents, i) { sg->dma_address = sg_phys(sg) + get_dma_direct_offset(dev); sg->dma_length = sg->length; __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); } return nents; } static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction, struct dma_attrs *attrs) { } static int dma_direct_dma_supported(struct device *dev, u64 mask) { #ifdef CONFIG_PPC64 /* Could be improved to check for memory though it better be * done via some global so platforms can set the limit in case * they have limited DMA windows */ return mask >= DMA_BIT_MASK(32); #else return 1; #endif } static inline dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction dir, struct dma_attrs *attrs) { BUG_ON(dir == DMA_NONE); __dma_sync_page(page, offset, size, dir); return page_to_phys(page) + offset + get_dma_direct_offset(dev); } static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) { } #ifdef CONFIG_NOT_COHERENT_CACHE static inline void dma_direct_sync_sg(struct device *dev, struct scatterlist *sgl, int nents, enum dma_data_direction direction) { struct scatterlist *sg; int i; for_each_sg(sgl, sg, nents, i) __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); } static inline void dma_direct_sync_single_range(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction) { __dma_sync(bus_to_virt(dma_handle+offset), size, direction); } #endif struct dma_mapping_ops dma_direct_ops = { .alloc_coherent = dma_direct_alloc_coherent, .free_coherent = dma_direct_free_coherent, .map_sg = dma_direct_map_sg, .unmap_sg = dma_direct_unmap_sg, .dma_supported = dma_direct_dma_supported, .map_page = dma_direct_map_page, .unmap_page = dma_direct_unmap_page, #ifdef CONFIG_NOT_COHERENT_CACHE .sync_single_range_for_cpu = dma_direct_sync_single_range, .sync_single_range_for_device = dma_direct_sync_single_range, .sync_sg_for_cpu = dma_direct_sync_sg, .sync_sg_for_device = dma_direct_sync_sg, #endif }; EXPORT_SYMBOL(dma_direct_ops); Index: head_32.S =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/kernel/head_32.S,v retrieving revision 1.9 retrieving revision 1.10 diff -C2 -d -r1.9 -r1.10 *** head_32.S 25 Oct 2009 18:33:46 -0000 1.9 --- head_32.S 25 Oct 2009 18:45:35 -0000 1.10 *************** *** 22,25 **** --- 22,26 ---- */ + #include <linux/init.h> #include <asm/reg.h> #include <asm/page.h> *************** *** 51,55 **** 1: ! .section .text.head, "ax" .stabs "arch/powerpc/kernel/",N_SO,0,0,0f .stabs "head_32.S",N_SO,0,0,0f --- 52,56 ---- 1: ! __HEAD .stabs "arch/powerpc/kernel/",N_SO,0,0,0f .stabs "head_32.S",N_SO,0,0,0f *************** *** 109,116 **** * (particularly on CHRP). */ - #ifdef CONFIG_PPC_MULTIPLATFORM cmpwi 0,r5,0 beq 1f /* find out where we are now */ bcl 20,31,$+4 --- 110,117 ---- * (particularly on CHRP). */ cmpwi 0,r5,0 beq 1f + #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE /* find out where we are now */ bcl 20,31,$+4 *************** *** 119,124 **** addi r8,r8,(_stext - 0b)@l /* current runtime base addr */ bl prom_init trap - #endif /* --- 120,128 ---- addi r8,r8,(_stext - 0b)@l /* current runtime base addr */ bl prom_init + #endif /* CONFIG_PPC_OF_BOOT_TRAMPOLINE */ + + /* We never return. We also hit that trap if trying to boot + * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */ trap /* *************** *** 473,482 **** InstructionTLBMiss: /* ! * r0: stored ctr * r1: linux style pte ( later becomes ppc hardware pte ) * r2: ptr to linux-style pte * r3: scratch */ - mfctr r0 /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_IMISS --- 477,485 ---- InstructionTLBMiss: /* ! * r0: scratch * r1: linux style pte ( later becomes ppc hardware pte ) * r2: ptr to linux-style pte * r3: scratch */ /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_IMISS *************** *** 497,522 **** beq- InstructionAddressInvalid /* return if no mapping */ rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ ! lwz r3,0(r2) /* get linux-style pte */ ! andc. r1,r1,r3 /* check access & ~permission */ bne- InstructionAddressInvalid /* return if access not permitted */ ! ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ /* * NOTE! We are assuming this is not an SMP system, otherwise * we would need to update the pte atomically with lwarx/stwcx. */ ! stw r3,0(r2) /* update PTE (accessed bit) */ /* Convert linux-style PTE to low word of PPC-style PTE */ ! rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */ ! rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ and r1,r1,r2 /* writable if _RW and _DIRTY */ ! rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ ! rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ ori r1,r1,0xe04 /* clear out reserved bits */ ! andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ BEGIN_FTR_SECTION rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) mtspr SPRN_RPA,r1 - mfspr r3,SPRN_IMISS tlbli r3 mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ --- 500,524 ---- beq- InstructionAddressInvalid /* return if no mapping */ rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ ! lwz r0,0(r2) /* get linux-style pte */ ! andc. r1,r1,r0 /* check access & ~permission */ bne- InstructionAddressInvalid /* return if access not permitted */ ! ori r0,r0,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ /* * NOTE! We are assuming this is not an SMP system, otherwise * we would need to update the pte atomically with lwarx/stwcx. */ ! stw r0,0(r2) /* update PTE (accessed bit) */ /* Convert linux-style PTE to low word of PPC-style PTE */ ! rlwinm r1,r0,32-10,31,31 /* _PAGE_RW -> PP lsb */ ! rlwinm r2,r0,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ and r1,r1,r2 /* writable if _RW and _DIRTY */ ! rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */ ! rlwimi r0,r0,32-1,31,31 /* _PAGE_USER -> PP lsb */ ori r1,r1,0xe04 /* clear out reserved bits */ ! andc r1,r0,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ BEGIN_FTR_SECTION rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) mtspr SPRN_RPA,r1 tlbli r3 mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ *************** *** 529,533 **** addis r1,r1,0x2000 mtspr SPRN_DSISR,r1 /* (shouldn't be needed) */ - mtctr r0 /* Restore CTR */ andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ or r2,r2,r1 --- 531,534 ---- *************** *** 550,559 **** DataLoadTLBMiss: /* ! * r0: stored ctr * r1: linux style pte ( later becomes ppc hardware pte ) * r2: ptr to linux-style pte * r3: scratch */ - mfctr r0 /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_DMISS --- 551,559 ---- DataLoadTLBMiss: /* ! * r0: scratch * r1: linux style pte ( later becomes ppc hardware pte ) * r2: ptr to linux-style pte * r3: scratch */ /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_DMISS *************** *** 574,602 **** beq- DataAddressInvalid /* return if no mapping */ rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ ! lwz r3,0(r2) /* get linux-style pte */ ! andc. r1,r1,r3 /* check access & ~permission */ bne- DataAddressInvalid /* return if access not permitted */ ! ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ /* * NOTE! We are assuming this is not an SMP system, otherwise * we would need to update the pte atomically with lwarx/stwcx. */ ! stw r3,0(r2) /* update PTE (accessed bit) */ /* Convert linux-style PTE to low word of PPC-style PTE */ ! rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */ ! rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ and r1,r1,r2 /* writable if _RW and _DIRTY */ ! rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ ! rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ ori r1,r1,0xe04 /* clear out reserved bits */ ! andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ BEGIN_FTR_SECTION rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) mtspr SPRN_RPA,r1 ! mfspr r3,SPRN_DMISS tlbld r3 - mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ - mtcrf 0x80,r3 rfi DataAddressInvalid: --- 574,613 ---- beq- DataAddressInvalid /* return if no mapping */ rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ ! lwz r0,0(r2) /* get linux-style pte */ ! andc. r1,r1,r0 /* check access & ~permission */ bne- DataAddressInvalid /* return if access not permitted */ ! ori r0,r0,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ /* * NOTE! We are assuming this is not an SMP system, otherwise * we would need to update the pte atomically with lwarx/stwcx. */ ! stw r0,0(r2) /* update PTE (accessed bit) */ /* Convert linux-style PTE to low word of PPC-style PTE */ ! rlwinm r1,r0,32-10,31,31 /* _PAGE_RW -> PP lsb */ ! rlwinm r2,r0,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ and r1,r1,r2 /* writable if _RW and _DIRTY */ ! rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */ ! rlwimi r0,r0,32-1,31,31 /* _PAGE_USER -> PP lsb */ ori r1,r1,0xe04 /* clear out reserved bits */ ! andc r1,r0,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ BEGIN_FTR_SECTION rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) mtspr SPRN_RPA,r1 ! mfspr r2,SPRN_SRR1 /* Need to restore CR0 */ ! mtcrf 0x80,r2 ! BEGIN_MMU_FTR_SECTION ! li r0,1 ! mfspr r1,SPRN_SPRG4 ! rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */ ! slw r0,r0,r2 ! xor r1,r0,r1 ! srw r0,r1,r2 ! mtspr SPRN_SPRG4,r1 ! mfspr r2,SPRN_SRR1 ! rlwimi r2,r0,31-14,14,14 ! mtspr SPRN_SRR1,r2 ! END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU) tlbld r3 rfi DataAddressInvalid: *************** *** 605,609 **** addis r1,r1,0x2000 mtspr SPRN_DSISR,r1 - mtctr r0 /* Restore CTR */ andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ mtspr SPRN_SRR1,r2 --- 616,619 ---- *************** *** 625,634 **** DataStoreTLBMiss: /* ! * r0: stored ctr * r1: linux style pte ( later becomes ppc hardware pte ) * r2: ptr to linux-style pte * r3: scratch */ - mfctr r0 /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_DMISS --- 635,643 ---- DataStoreTLBMiss: /* ! * r0: scratch * r1: linux style pte ( later becomes ppc hardware pte ) * r2: ptr to linux-style pte * r3: scratch */ /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_DMISS *************** *** 649,673 **** beq- DataAddressInvalid /* return if no mapping */ rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ ! lwz r3,0(r2) /* get linux-style pte */ ! andc. r1,r1,r3 /* check access & ~permission */ bne- DataAddressInvalid /* return if access not permitted */ ! ori r3,r3,_PAGE_ACCESSED|_PAGE_DIRTY /* * NOTE! We are assuming this is not an SMP system, otherwise * we would need to update the pte atomically with lwarx/stwcx. */ ! stw r3,0(r2) /* update PTE (accessed/dirty bits) */ /* Convert linux-style PTE to low word of PPC-style PTE */ ! rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ li r1,0xe05 /* clear out reserved bits & PP lsb */ ! andc r1,r3,r1 /* PP = user? 2: 0 */ BEGIN_FTR_SECTION rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) mtspr SPRN_RPA,r1 ! mfspr r3,SPRN_DMISS tlbld r3 - mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ - mtcrf 0x80,r3 rfi --- 658,693 ---- beq- DataAddressInvalid /* return if no mapping */ rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ ! lwz r0,0(r2) /* get linux-style pte */ ! andc. r1,r1,r0 /* check access & ~permission */ bne- DataAddressInvalid /* return if access not permitted */ ! ori r0,r0,_PAGE_ACCESSED|_PAGE_DIRTY /* * NOTE! We are assuming this is not an SMP system, otherwise * we would need to update the pte atomically with lwarx/stwcx. */ ! stw r0,0(r2) /* update PTE (accessed/dirty bits) */ /* Convert linux-style PTE to low word of PPC-style PTE */ ! rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */ li r1,0xe05 /* clear out reserved bits & PP lsb */ ! andc r1,r0,r1 /* PP = user? 2: 0 */ BEGIN_FTR_SECTION rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) mtspr SPRN_RPA,r1 ! mfspr r2,SPRN_SRR1 /* Need to restore CR0 */ ! mtcrf 0x80,r2 ! BEGIN_MMU_FTR_SECTION ! li r0,1 ! mfspr r1,SPRN_SPRG4 ! rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */ ! slw r0,r0,r2 ! xor r1,r0,r1 ! srw r0,r1,r2 ! mtspr SPRN_SPRG4,r1 ! mfspr r2,SPRN_SRR1 ! rlwimi r2,r0,31-14,14,14 ! mtspr SPRN_SRR1,r2 ! END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU) tlbld r3 rfi Index: cputable.c =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/kernel/cputable.c,v retrieving revision 1.8 retrieving revision 1.9 diff -C2 -d -r1.8 -r1.9 *** cputable.c 25 Oct 2009 18:33:46 -0000 1.8 --- cputable.c 25 Oct 2009 18:45:35 -0000 1.9 *************** *** 36,39 **** --- 36,43 ---- */ #ifdef CONFIG_PPC32 + extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); + extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); + extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); + extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); *************** *** 44,47 **** --- 48,52 ---- extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); + extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); *************** *** 378,382 **** .dcache_bsize = 128, .machine_check = machine_check_generic, ! .oprofile_cpu_type = "ppc64/compat-power5+", .platform = "power5+", }, --- 383,388 ---- .dcache_bsize = 128, .machine_check = machine_check_generic, ! .oprofile_cpu_type = "ppc64/ibm-compat-v1", ! .oprofile_type = PPC_OPROFILE_POWER4, .platform = "power5+", }, *************** *** 412,416 **** .dcache_bsize = 128, .machine_check = machine_check_generic, ! .oprofile_cpu_type = "ppc64/compat-power6", .platform = "power6", }, --- 418,423 ---- .dcache_bsize = 128, .machine_check = machine_check_generic, ! .oprofile_cpu_type = "ppc64/ibm-compat-v1", ! .oprofile_type = PPC_OPROFILE_POWER4, .platform = "power6", }, *************** *** 425,429 **** .dcache_bsize = 128, .machine_check = machine_check_generic, ! .oprofile_cpu_type = "ppc64/compat-power7", .platform = "power7", }, --- 432,437 ---- .dcache_bsize = 128, .machine_check = machine_check_generic, ! .oprofile_type = PPC_OPROFILE_POWER4, ! .oprofile_cpu_type = "ppc64/ibm-compat-v1", .platform = "power7", }, *************** *** 727,730 **** --- 735,740 ---- .machine_check = machine_check_generic, .platform = "ppc750", + .oprofile_cpu_type = "ppc/750", + .oprofile_type = PPC_OPROFILE_G4, }, { /* 750FX rev 2.0 must disable HID0[DPM] */ *************** *** 742,745 **** --- 752,757 ---- .machine_check = machine_check_generic, .platform = "ppc750", + .oprofile_cpu_type = "ppc/750", + .oprofile_type = PPC_OPROFILE_G4, }, { /* 750FX (All revs except 2.0) */ *************** *** 757,760 **** --- 769,774 ---- .machine_check = machine_check_generic, .platform = "ppc750", + .oprofile_cpu_type = "ppc/750", + .oprofile_type = PPC_OPROFILE_G4, }, { /* 750GX */ *************** *** 772,775 **** --- 786,791 ---- .machine_check = machine_check_generic, .platform = "ppc750", + .oprofile_cpu_type = "ppc/750", + .oprofile_type = PPC_OPROFILE_G4, }, { /* 740/750 (L2CR bit need fixup for 740) */ *************** *** 1078,1082 **** .cpu_features = CPU_FTRS_E300C2, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, ! .mmu_features = MMU_FTR_USE_HIGH_BATS, .icache_bsize = 32, .dcache_bsize = 32, --- 1094,1099 ---- .cpu_features = CPU_FTRS_E300C2, .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, ! .mmu_features = MMU_FTR_USE_HIGH_BATS | ! MMU_FTR_NEED_DTLB_SW_LRU, .icache_bsize = 32, .dcache_bsize = 32, *************** *** 1091,1095 **** .cpu_features = CPU_FTRS_E300, .cpu_user_features = COMMON_USER, ! .mmu_features = MMU_FTR_USE_HIGH_BATS, .icache_bsize = 32, .dcache_bsize = 32, --- 1108,1113 ---- .cpu_features = CPU_FTRS_E300, .cpu_user_features = COMMON_USER, ! .mmu_features = MMU_FTR_USE_HIGH_BATS | ! MMU_FTR_NEED_DTLB_SW_LRU, .icache_bsize = 32, .dcache_bsize = 32, *************** *** 1106,1110 **** .cpu_features = CPU_FTRS_E300, .cpu_user_features = COMMON_USER, ! .mmu_features = MMU_FTR_USE_HIGH_BATS, .icache_bsize = 32, .dcache_bsize = 32, --- 1124,1129 ---- .cpu_features = CPU_FTRS_E300, .cpu_user_features = COMMON_USER, ! .mmu_features = MMU_FTR_USE_HIGH_BATS | ! MMU_FTR_NEED_DTLB_SW_LRU, .icache_bsize = 32, .dcache_bsize = 32, *************** *** 1635,1638 **** --- 1654,1670 ---- .platform = "ppc440", }, + { /* 460SX */ + .pvr_mask = 0xffffff00, + .pvr_value = 0x13541800, + .cpu_name = "460SX", + .cpu_features = CPU_FTRS_44X, + .cpu_user_features = COMMON_USER_BOOKE, + .mmu_features = MMU_FTR_TYPE_44x, + .icache_bsize = 32, + .dcache_bsize = 32, + .cpu_setup = __setup_cpu_460sx, + .machine_check = machine_check_440A, + .platform = "ppc440", + }, { /* default match */ .pvr_mask = 0x00000000, *************** *** 1688,1691 **** --- 1720,1724 ---- .mmu_features = MMU_FTR_TYPE_FSL_E, .dcache_bsize = 32, + .cpu_setup = __setup_cpu_e200, .machine_check = machine_check_e200, .platform = "ppc5554", *************** *** 1707,1710 **** --- 1740,1744 ---- .oprofile_cpu_type = "ppc/e500", .oprofile_type = PPC_OPROFILE_FSL_EMB, + .cpu_setup = __setup_cpu_e500v1, .machine_check = machine_check_e500, .platform = "ppc8540", *************** *** 1725,1728 **** --- 1759,1763 ---- .oprofile_cpu_type = "ppc/e500", .oprofile_type = PPC_OPROFILE_FSL_EMB, + .cpu_setup = __setup_cpu_e500v2, .machine_check = machine_check_e500, .platform = "ppc8548", *************** *** 1734,1738 **** .cpu_features = CPU_FTRS_E500MC, .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, ! .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, .icache_bsize = 64, .dcache_bsize = 64, --- 1769,1774 ---- .cpu_features = CPU_FTRS_E500MC, .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, ! .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | ! MMU_FTR_USE_TLBILX, .icache_bsize = 64, .dcache_bsize = 64, *************** *** 1740,1743 **** --- 1776,1780 ---- .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ .oprofile_type = PPC_OPROFILE_FSL_EMB, + .cpu_setup = __setup_cpu_e500mc, .machine_check = machine_check_e500, .platform = "ppce500mc", *************** *** 1763,1835 **** static struct cpu_spec the_cpu_spec; ! struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) { - struct cpu_spec *s = cpu_specs; struct cpu_spec *t = &the_cpu_spec; ! int i; - s = PTRRELOC(s); t = PTRRELOC(t); ! for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) ! if ((pvr & s->pvr_mask) == s->pvr_value) { ! /* ! * If we are overriding a previous value derived ! * from the real PVR with a new value obtained ! * using a logical PVR value, don't modify the ! * performance monitor fields. ! */ ! if (t->num_pmcs && !s->num_pmcs) { ! t->cpu_name = s->cpu_name; ! t->cpu_features = s->cpu_features; ! t->cpu_user_features = s->cpu_user_features; ! t->icache_bsize = s->icache_bsize; ! t->dcache_bsize = s->dcache_bsize; ! t->cpu_setup = s->cpu_setup; ! t->cpu_restore = s->cpu_restore; ! t->platform = s->platform; ! /* ! * If we have passed through this logic once ! * before and have pulled the default case ! * because the real PVR was not found inside ! * cpu_specs[], then we are possibly running in ! * compatibility mode. In that case, let the ! * oprofiler know which set of compatibility ! * counters to pull from by making sure the ! * oprofile_cpu_type string is set to that of ! * compatibility mode. If the oprofile_cpu_type ! * already has a value, then we are possibly ! * overriding a real PVR with a logical one, and, ! * in that case, keep the current value for ! * oprofile_cpu_type. ! */ ! if (t->oprofile_cpu_type == NULL) ! t->oprofile_cpu_type = s->oprofile_cpu_type; ! } else ! *t = *s; ! *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; ! /* ! * Set the base platform string once; assumes ! * we're called with real pvr first. ! */ ! if (*PTRRELOC(&powerpc_base_platform) == NULL) ! *PTRRELOC(&powerpc_base_platform) = t->platform; #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) ! /* ppc64 and booke expect identify_cpu to also call ! * setup_cpu for that processor. I will consolidate ! * that at a later time, for now, just use #ifdef. ! * we also don't need to PTRRELOC the function pointer ! * on ppc64 and booke as we are running at 0 in real ! * mode on ppc64 and reloc_offset is always 0 on booke. ! */ ! if (s->cpu_setup) { ! s->cpu_setup(offset, s); ! } #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ return s; } BUG(); return NULL; } --- 1800,1884 ---- static struct cpu_spec the_cpu_spec; ! static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) { struct cpu_spec *t = &the_cpu_spec; ! struct cpu_spec old; t = PTRRELOC(t); + old = *t; ! /* Copy everything, then do fixups */ ! *t = *s; ! /* ! * If we are overriding a previous value derived from the real ! * PVR with a new value obtained using a logical PVR value, ! * don't modify the performance monitor fields. ! */ ! if (old.num_pmcs && !s->num_pmcs) { ! t->num_pmcs = old.num_pmcs; ! t->pmc_type = old.pmc_type; ! t->oprofile_type = old.oprofile_type; ! t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; ! t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; ! t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; ! ! /* ! * If we have passed through this logic once before and ! * have pulled the default case because the real PVR was ! * not found inside cpu_specs[], then we are possibly ! * running in compatibility mode. In that case, let the ! * oprofiler know which set of compatibility counters to ! * pull from by making sure the oprofile_cpu_type string ! * is set to that of compatibility mode. If the ! * oprofile_cpu_type already has a value, then we are ! * possibly overriding a real PVR with a logical one, ! * and, in that case, keep the current value for ! * oprofile_cpu_type. ! */ ! if (old.oprofile_cpu_type != NULL) { ! t->oprofile_cpu_type = old.oprofile_cpu_type; ! t->oprofile_type = old.oprofile_type; ! } ! } ! ! *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; ! ! /* ! * Set the base platform string once; assumes ! * we're called with real pvr first. ! */ ! if (*PTRRELOC(&powerpc_base_platform) == NULL) ! *PTRRELOC(&powerpc_base_platform) = t->platform; #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) ! /* ppc64 and booke expect identify_cpu to also call setup_cpu for ! * that processor. I will consolidate that at a later time, for now, ! * just use #ifdef. We also don't need to PTRRELOC the function ! * pointer on ppc64 and booke as we are running at 0 in real mode ! * on ppc64 and reloc_offset is always 0 on booke. ! */ ! if (s->cpu_setup) { ! s->cpu_setup(offset, s); ! } #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ + } + + struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) + { + struct cpu_spec *s = cpu_specs; + int i; + + s = PTRRELOC(s); + + for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { + if ((pvr & s->pvr_mask) == s->pvr_value) { + setup_cpu_spec(offset, s); return s; } + } + BUG(); + return NULL; } |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/arch/powerpc/mm In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/arch/powerpc/mm Modified Files: pgtable_32.c Log Message: Forward to v.2.6.30. Index: pgtable_32.c =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/mm/pgtable_32.c,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** pgtable_32.c 25 Oct 2009 18:33:46 -0000 1.4 --- pgtable_32.c 25 Oct 2009 18:45:35 -0000 1.5 *************** *** 130,134 **** ioremap(phys_addr_t addr, unsigned long size) { ! return __ioremap(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED); } EXPORT_SYMBOL(ioremap); --- 130,135 ---- ioremap(phys_addr_t addr, unsigned long size) { ! return __ioremap_caller(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED, ! __builtin_return_address(0)); } EXPORT_SYMBOL(ioremap); *************** *** 144,148 **** flags &= ~(_PAGE_USER | _PAGE_EXEC | _PAGE_HWEXEC); ! return __ioremap(addr, size, flags); } EXPORT_SYMBOL(ioremap_flags); --- 145,149 ---- flags &= ~(_PAGE_USER | _PAGE_EXEC | _PAGE_HWEXEC); ! return __ioremap_caller(addr, size, flags, __builtin_return_address(0)); } EXPORT_SYMBOL(ioremap_flags); *************** *** 151,154 **** --- 152,162 ---- __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) { + return __ioremap_caller(addr, size, flags, __builtin_return_address(0)); + } + + void __iomem * + __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags, + void *caller) + { unsigned long v, i; phys_addr_t p; *************** *** 157,161 **** /* Make sure we have the base flags */ if ((flags & _PAGE_PRESENT) == 0) ! flags |= _PAGE_KERNEL; /* Non-cacheable page cannot be coherent */ --- 165,169 ---- /* Make sure we have the base flags */ if ((flags & _PAGE_PRESENT) == 0) ! flags |= PAGE_KERNEL; /* Non-cacheable page cannot be coherent */ *************** *** 213,217 **** if (mem_init_done) { struct vm_struct *area; ! area = get_vm_area(size, VM_IOREMAP); if (area == 0) return NULL; --- 221,225 ---- if (mem_init_done) { struct vm_struct *area; ! area = get_vm_area_caller(size, VM_IOREMAP, caller); if (area == 0) return NULL; *************** *** 289,293 **** for (; s < total_lowmem; s += PAGE_SIZE) { ktext = ((char *) v >= _stext && (char *) v < etext); ! f = ktext ?_PAGE_RAM_TEXT : _PAGE_RAM; map_page(v, p, f); #ifdef CONFIG_PPC_STD_MMU_32 --- 297,301 ---- for (; s < total_lowmem; s += PAGE_SIZE) { ktext = ((char *) v >= _stext && (char *) v < etext); ! f = ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL; map_page(v, p, f); #ifdef CONFIG_PPC_STD_MMU_32 *************** *** 392,397 **** static int fixmaps; - unsigned long FIXADDR_TOP = (-PAGE_SIZE); - EXPORT_SYMBOL(FIXADDR_TOP); void __set_fixmap (enum fixed_addresses idx, phys_addr_t phys, pgprot_t flags) --- 400,403 ---- |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/arch/powerpc/platforms In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/arch/powerpc/platforms Modified Files: Kconfig.cputype Log Message: Forward to v.2.6.30. Index: Kconfig.cputype =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/platforms/Kconfig.cputype,v retrieving revision 1.8 retrieving revision 1.9 diff -C2 -d -r1.8 -r1.9 *** Kconfig.cputype 25 Oct 2009 18:33:46 -0000 1.8 --- Kconfig.cputype 25 Oct 2009 18:45:35 -0000 1.9 *************** *** 58,64 **** endchoice config POWER4_ONLY bool "Optimize for POWER4" ! depends on PPC64 default n ---help--- --- 58,72 ---- endchoice + # Until we have a choice of exclusive CPU types on 64-bit, we always + # use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is + # "classic" MMU + + config PPC_BOOK3S + def_bool y + depends on PPC64 || 6xx + config POWER4_ONLY bool "Optimize for POWER4" ! depends on PPC64 && PPC_BOOK3S default n ---help--- *************** *** 69,82 **** config POWER3 bool ! depends on PPC64 default y if !POWER4_ONLY config POWER4 ! depends on PPC64 def_bool y config TUNE_CELL bool "Optimize for Cell Broadband Engine" ! depends on PPC64 help Cause the compiler to optimize for the PPE of the Cell Broadband --- 77,90 ---- config POWER3 bool ! depends on PPC64 && PPC_BOOK3S default y if !POWER4_ONLY config POWER4 ! depends on PPC64 && PPC_BOOK3S def_bool y config TUNE_CELL bool "Optimize for Cell Broadband Engine" ! depends on PPC64 && PPC_BOOK3S help Cause the compiler to optimize for the PPE of the Cell Broadband *************** *** 148,152 **** config ALTIVEC bool "AltiVec Support" ! depends on CLASSIC32 || POWER4 ---help--- This option enables kernel support for the Altivec extensions to the --- 156,160 ---- config ALTIVEC bool "AltiVec Support" ! depends on 6xx || POWER4 ---help--- This option enables kernel support for the Altivec extensions to the *************** *** 211,214 **** --- 219,226 ---- depends on !PPC_STD_MMU + config PPC_BOOK3E_MMU + def_bool y + depends on FSL_BOOKE + config PPC_MM_SLICES bool |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
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Update of /cvsroot/gc-linux/linux/drivers/i2c/busses In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/i2c/busses Modified Files: Kconfig Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/i2c/busses/Makefile,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** Makefile 25 Oct 2009 18:33:47 -0000 1.4 --- Makefile 25 Oct 2009 18:45:35 -0000 1.5 *************** *** 34,37 **** --- 34,38 ---- obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o + obj-$(CONFIG_I2C_IMX) += i2c-imx.o obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o *************** *** 44,47 **** --- 45,49 ---- obj-$(CONFIG_I2C_PXA) += i2c-pxa.o obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o + obj-$(CONFIG_I2C_S6000) += i2c-s6000.o obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/i2c/busses/Kconfig,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.4 --- Kconfig 25 Oct 2009 18:45:35 -0000 1.5 *************** *** 133,136 **** --- 133,137 ---- Serverworks CSB6 Serverworks HT-1000 + Serverworks HT-1100 SMSC Victory66 *************** *** 356,359 **** --- 357,370 ---- will be called i2c-ibm_iic. + config I2C_IMX + tristate "IMX I2C interface" + depends on ARCH_MXC + help + Say Y here if you want to use the IIC bus controller on + the Freescale i.MX/MXC processors. + + This driver can also be built as a module. If so, the module + will be called i2c-imx. + config I2C_IOP3XX tristate "Intel IOPx3xx and IXP4xx on-chip I2C interface" *************** *** 457,465 **** config I2C_S3C2410 tristate "S3C2410 I2C Driver" ! depends on ARCH_S3C2410 help Say Y here to include support for I2C controller in the Samsung S3C2410 based System-on-Chip devices. config I2C_SH7760 tristate "Renesas SH7760 I2C Controller" --- 468,486 ---- config I2C_S3C2410 tristate "S3C2410 I2C Driver" ! depends on ARCH_S3C2410 || ARCH_S3C64XX help Say Y here to include support for I2C controller in the Samsung S3C2410 based System-on-Chip devices. + config I2C_S6000 + tristate "S6000 I2C support" + depends on XTENSA_VARIANT_S6000 + help + This driver supports the on chip I2C device on the + S6000 xtensa processor family. + + To compile this driver as a module, choose M here. The module + will be called i2c-s6000. + config I2C_SH7760 tristate "Renesas SH7760 I2C Controller" *************** *** 584,593 **** config I2C_VOODOO3 ! tristate "Voodoo 3" depends on PCI select I2C_ALGOBIT help If you say yes to this option, support will be included for the ! Voodoo 3 I2C interface. This driver can also be built as a module. If so, the module --- 605,616 ---- config I2C_VOODOO3 ! tristate "Voodoo 3 (DEPRECATED)" depends on PCI select I2C_ALGOBIT help If you say yes to this option, support will be included for the ! Voodoo 3 I2C interface. This driver is deprecated and you should ! use the tdfxfb driver instead, which additionally provides ! framebuffer support. This driver can also be built as a module. If so, the module *************** *** 618,627 **** config I2C_PCA_ISA ! tristate "PCA9564 on an ISA bus" depends on ISA select I2C_ALGOPCA default n help ! This driver supports ISA boards using the Philips PCA9564 parallel bus to I2C bus controller. --- 641,650 ---- config I2C_PCA_ISA ! tristate "PCA9564/PCA9665 on an ISA bus" depends on ISA select I2C_ALGOPCA default n help ! This driver supports ISA boards using the Philips PCA9564/PCA9665 parallel bus to I2C bus controller. *************** *** 635,643 **** config I2C_PCA_PLATFORM ! tristate "PCA9564 as platform device" select I2C_ALGOPCA default n help ! This driver supports a memory mapped Philips PCA9564 parallel bus to I2C bus controller. --- 658,666 ---- config I2C_PCA_PLATFORM ! tristate "PCA9564/PCA9665 as platform device" select I2C_ALGOPCA default n help ! This driver supports a memory mapped Philips PCA9564/PCA9665 parallel bus to I2C bus controller. |
From: Albert H. <he...@us...> - 2009-10-25 18:45:45
|
Update of /cvsroot/gc-linux/linux/drivers/usb In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/usb Modified Files: Kconfig Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/usb/Makefile,v retrieving revision 1.5 retrieving revision 1.6 diff -C2 -d -r1.5 -r1.6 *** Makefile 25 Oct 2009 18:33:47 -0000 1.5 --- Makefile 25 Oct 2009 18:45:36 -0000 1.6 *************** *** 12,16 **** obj-$(CONFIG_USB_EHCI_HCD) += host/ obj-$(CONFIG_USB_ISP116X_HCD) += host/ - obj-$(CONFIG_USB_ISP1760_HCD) += host/ obj-$(CONFIG_USB_OHCI_HCD) += host/ obj-$(CONFIG_USB_UHCI_HCD) += host/ --- 12,15 ---- *************** *** 20,23 **** --- 19,23 ---- obj-$(CONFIG_USB_R8A66597_HCD) += host/ obj-$(CONFIG_USB_HWA_HCD) += host/ + obj-$(CONFIG_USB_ISP1760_HCD) += host/ obj-$(CONFIG_USB_C67X00_HCD) += c67x00/ *************** *** 27,30 **** --- 27,32 ---- obj-$(CONFIG_USB_ACM) += class/ obj-$(CONFIG_USB_PRINTER) += class/ + obj-$(CONFIG_USB_WDM) += class/ + obj-$(CONFIG_USB_TMC) += class/ obj-$(CONFIG_USB_STORAGE) += storage/ Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/usb/Kconfig,v retrieving revision 1.6 retrieving revision 1.7 diff -C2 -d -r1.6 -r1.7 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.6 --- Kconfig 25 Oct 2009 18:45:36 -0000 1.7 *************** *** 48,51 **** --- 48,52 ---- default y if CPU_SUBTYPE_SH7721 default y if CPU_SUBTYPE_SH7763 + default y if CPU_SUBTYPE_SH7786 # more: default PCI |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
|
Update of /cvsroot/gc-linux/linux/arch/powerpc In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/arch/powerpc Modified Files: Kconfig Kconfig.debug Log Message: Forward to v.2.6.30. Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/Kconfig,v retrieving revision 1.8 retrieving revision 1.9 diff -C2 -d -r1.8 -r1.9 *** Kconfig 25 Oct 2009 18:33:46 -0000 1.8 --- Kconfig 25 Oct 2009 18:45:35 -0000 1.9 *************** *** 112,115 **** --- 112,116 ---- select HAVE_DYNAMIC_FTRACE select HAVE_FUNCTION_TRACER + select HAVE_FUNCTION_GRAPH_TRACER select ARCH_WANT_OPTIONAL_GPIOLIB select HAVE_IDE *************** *** 181,184 **** --- 182,189 ---- bool + config DTC + bool + default y + config DEFAULT_UIMAGE bool *************** *** 228,231 **** --- 233,239 ---- default n + config ARCH_SUPPORTS_DEBUG_PAGEALLOC + def_bool y + source "init/Kconfig" *************** *** 313,317 **** config KEXEC bool "kexec system call (EXPERIMENTAL)" ! depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL help kexec is a system call that implements the ability to shutdown your --- 321,325 ---- config KEXEC bool "kexec system call (EXPERIMENTAL)" ! depends on PPC_BOOK3S && EXPERIMENTAL help kexec is a system call that implements the ability to shutdown your *************** *** 343,347 **** Hypervisor-assisted dump is meant to be a kdump replacement offering robustness and speed not possible without system ! hypervisor assistence. If unsure, say "N" --- 351,355 ---- Hypervisor-assisted dump is meant to be a kdump replacement offering robustness and speed not possible without system ! hypervisor assistance. If unsure, say "N" *************** *** 410,413 **** --- 418,433 ---- default n + config STDBINUTILS + bool "Using standard binutils settings" + depends on 44x + default y + help + Turning this option off allows you to select 256KB PAGE_SIZE on 44x. + Note, that kernel will be able to run only those applications, + which had been compiled using binutils later than 2.17.50.0.3 with + '-zmax-page-size' set to 256K (the default is 64K). Or, if using + the older binutils, you can patch them with a trivial patch, which + changes the ELF_MAXPAGESIZE definition from 0x10000 to 0x40000. + choice prompt "Page size" *************** *** 445,448 **** --- 465,481 ---- select PPC_HAS_HASH_64K if PPC_STD_MMU_64 + config PPC_256K_PAGES + bool "256k page size" if 44x + depends on !STDBINUTILS + help + Make the page size 256k. + + As the ELF standard only requires alignment to support page + sizes up to 64k, you will need to compile all of your user + space applications with a non-standard binutils settings + (see the STDBINUTILS description for details). + + Say N unless you know what you are doing. + endchoice *************** *** 457,460 **** --- 490,495 ---- range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES + range 5 64 if PPC_STD_MMU_32 && PPC_256K_PAGES + default "5" if PPC_STD_MMU_32 && PPC_256K_PAGES range 11 64 default "11" *************** *** 595,598 **** --- 630,634 ---- bool select PPC_INDIRECT_PCI + select PCI_QUIRKS config 4xx_SOC *************** *** 731,734 **** --- 767,787 ---- default "0x30000000" + config LOWMEM_CAM_NUM_BOOL + bool "Set number of CAMs to use to map low memory" + depends on ADVANCED_OPTIONS && FSL_BOOKE + help + This option allows you to set the maximum number of CAM slots that + will be used to map low memory. There are a limited number of slots + available and even more limited number that will fit in the L1 MMU. + However, using more entries will allow mapping more low memory. This + can be useful in optimizing the layout of kernel virtual memory. + + Say N here unless you know what you are doing. + + config LOWMEM_CAM_NUM + depends on FSL_BOOKE + int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL + default 3 + config RELOCATABLE bool "Build a relocatable kernel (EXPERIMENTAL)" *************** *** 795,799 **** config PHYSICAL_ALIGN hex ! default "0x10000000" if FSL_BOOKE help This value puts the alignment restrictions on physical address --- 848,852 ---- config PHYSICAL_ALIGN hex ! default "0x04000000" if FSL_BOOKE help This value puts the alignment restrictions on physical address *************** *** 816,832 **** default "0xc0000000" - config CONSISTENT_START_BOOL - bool "Set custom consistent memory pool address" - depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE - help - This option allows you to set the base virtual address - of the consistent memory pool. This pool of virtual - memory is used to make consistent memory allocations. - - config CONSISTENT_START - hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL - default "0xfd000000" if (NOT_COHERENT_CACHE && 8xx) - default "0xff100000" if NOT_COHERENT_CACHE - config CONSISTENT_SIZE_BOOL bool "Set custom consistent memory pool size" --- 869,872 ---- Index: Kconfig.debug =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/Kconfig.debug,v retrieving revision 1.7 retrieving revision 1.8 diff -C2 -d -r1.7 -r1.8 *** Kconfig.debug 25 Oct 2009 18:33:46 -0000 1.7 --- Kconfig.debug 25 Oct 2009 18:45:35 -0000 1.8 *************** *** 28,40 **** This option will slow down process creation somewhat. - config DEBUG_PAGEALLOC - bool "Debug page memory allocations" - depends on DEBUG_KERNEL && !HIBERNATION - help - Unmap pages from the kernel linear mapping after free_pages(). - This results in a large slowdown, but helps to find certain types - of memory corruptions. - - config HCALL_STATS bool "Hypervisor call instrumentation" --- 28,31 ---- *************** *** 130,134 **** config BOOTX_TEXT bool "Support for early boot text console (BootX or OpenFirmware only)" ! depends on PPC_OF && PPC_MULTIPLATFORM help Say Y here to see progress messages from the boot firmware in text --- 121,125 ---- config BOOTX_TEXT bool "Support for early boot text console (BootX or OpenFirmware only)" ! depends on PPC_OF && PPC_BOOK3S help Say Y here to see progress messages from the boot firmware in text |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
|
Update of /cvsroot/gc-linux/linux/drivers/net/usb In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/net/usb Modified Files: usbnet.c Log Message: Forward to v.2.6.30. Index: usbnet.c =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/net/usb/usbnet.c,v retrieving revision 1.4 retrieving revision 1.5 diff -C2 -d -r1.4 -r1.5 *** usbnet.c 25 Oct 2009 18:33:47 -0000 1.4 --- usbnet.c 25 Oct 2009 18:45:36 -0000 1.5 *************** *** 224,228 **** *-------------------------------------------------------------------------*/ ! static int usbnet_change_mtu (struct net_device *net, int new_mtu) { struct usbnet *dev = netdev_priv(net); --- 224,228 ---- *-------------------------------------------------------------------------*/ ! int usbnet_change_mtu (struct net_device *net, int new_mtu) { struct usbnet *dev = netdev_priv(net); *************** *** 247,258 **** return 0; } ! ! /*-------------------------------------------------------------------------*/ ! ! static struct net_device_stats *usbnet_get_stats (struct net_device *net) ! { ! struct usbnet *dev = netdev_priv(net); ! return &dev->stats; ! } /*-------------------------------------------------------------------------*/ --- 247,251 ---- return 0; } ! EXPORT_SYMBOL_GPL(usbnet_change_mtu); /*-------------------------------------------------------------------------*/ *************** *** 549,553 **** // precondition: never called in_interrupt ! static int usbnet_stop (struct net_device *net) { struct usbnet *dev = netdev_priv(net); --- 542,546 ---- // precondition: never called in_interrupt ! int usbnet_stop (struct net_device *net) { struct usbnet *dev = netdev_priv(net); *************** *** 593,596 **** --- 586,590 ---- return 0; } + EXPORT_SYMBOL_GPL(usbnet_stop); /*-------------------------------------------------------------------------*/ *************** *** 600,604 **** // precondition: never called in_interrupt ! static int usbnet_open (struct net_device *net) { struct usbnet *dev = netdev_priv(net); --- 594,598 ---- // precondition: never called in_interrupt ! int usbnet_open (struct net_device *net) { struct usbnet *dev = netdev_priv(net); *************** *** 675,678 **** --- 669,673 ---- return retval; } + EXPORT_SYMBOL_GPL(usbnet_open); /*-------------------------------------------------------------------------*/ *************** *** 909,913 **** /*-------------------------------------------------------------------------*/ ! static void usbnet_tx_timeout (struct net_device *net) { struct usbnet *dev = netdev_priv(net); --- 904,908 ---- /*-------------------------------------------------------------------------*/ ! void usbnet_tx_timeout (struct net_device *net) { struct usbnet *dev = netdev_priv(net); *************** *** 918,925 **** // FIXME: device recovery -- reset? } /*-------------------------------------------------------------------------*/ ! static int usbnet_start_xmit (struct sk_buff *skb, struct net_device *net) { struct usbnet *dev = netdev_priv(net); --- 913,921 ---- // FIXME: device recovery -- reset? } + EXPORT_SYMBOL_GPL(usbnet_tx_timeout); /*-------------------------------------------------------------------------*/ ! int usbnet_start_xmit (struct sk_buff *skb, struct net_device *net) { struct usbnet *dev = netdev_priv(net); *************** *** 1004,1008 **** return retval; } ! /*-------------------------------------------------------------------------*/ --- 1000,1004 ---- return retval; } ! EXPORT_SYMBOL_GPL(usbnet_start_xmit); /*-------------------------------------------------------------------------*/ *************** *** 1111,1114 **** --- 1107,1119 ---- EXPORT_SYMBOL_GPL(usbnet_disconnect); + static const struct net_device_ops usbnet_netdev_ops = { + .ndo_open = usbnet_open, + .ndo_stop = usbnet_stop, + .ndo_start_xmit = usbnet_start_xmit, + .ndo_tx_timeout = usbnet_tx_timeout, + .ndo_change_mtu = usbnet_change_mtu, + .ndo_set_mac_address = eth_mac_addr, + .ndo_validate_addr = eth_validate_addr, + }; /*-------------------------------------------------------------------------*/ *************** *** 1176,1190 **** // dma_supported() is deeply broken on almost all architectures // possible with some EHCI controllers ! if (dma_supported (&udev->dev, DMA_64BIT_MASK)) net->features |= NETIF_F_HIGHDMA; #endif ! net->change_mtu = usbnet_change_mtu; ! net->get_stats = usbnet_get_stats; net->hard_start_xmit = usbnet_start_xmit; net->open = usbnet_open; net->stop = usbnet_stop; - net->watchdog_timeo = TX_TIMEOUT_JIFFIES; net->tx_timeout = usbnet_tx_timeout; net->ethtool_ops = &usbnet_ethtool_ops; --- 1181,1196 ---- // dma_supported() is deeply broken on almost all architectures // possible with some EHCI controllers ! if (dma_supported (&udev->dev, DMA_BIT_MASK(64))) net->features |= NETIF_F_HIGHDMA; #endif ! net->netdev_ops = &usbnet_netdev_ops; ! #ifdef CONFIG_COMPAT_NET_DEV_OPS net->hard_start_xmit = usbnet_start_xmit; net->open = usbnet_open; net->stop = usbnet_stop; net->tx_timeout = usbnet_tx_timeout; + #endif + net->watchdog_timeo = TX_TIMEOUT_JIFFIES; net->ethtool_ops = &usbnet_ethtool_ops; |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
|
Update of /cvsroot/gc-linux/linux/include/asm-generic In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/include/asm-generic Modified Files: gpio.h Log Message: Forward to v.2.6.30. Index: gpio.h =================================================================== RCS file: /cvsroot/gc-linux/linux/include/asm-generic/gpio.h,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** gpio.h 25 Oct 2009 18:33:47 -0000 1.3 --- gpio.h 25 Oct 2009 18:45:36 -0000 1.4 *************** *** 56,59 **** --- 56,63 ---- * @can_sleep: flag must be set iff get()/set() methods sleep, as they * must while accessing GPIO expander chips over I2C or SPI + * @names: if set, must be an array of strings to use as alternative + * names for the GPIOs in this chip. Any entry in the array + * may be NULL if there is no alias for the GPIO, however the + * array must be @ngpio entries long. * * A gpio_chip can help platforms abstract various sources of GPIOs so *************** *** 93,96 **** --- 97,101 ---- int base; u16 ngpio; + char **names; unsigned can_sleep:1; unsigned exported:1; |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
|
Update of /cvsroot/gc-linux/linux/drivers/input In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/input Modified Files: Kconfig Log Message: Forward to v.2.6.30. Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/input/Kconfig,v retrieving revision 1.12 retrieving revision 1.13 diff -C2 -d -r1.12 -r1.13 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.12 --- Kconfig 25 Oct 2009 18:45:35 -0000 1.13 *************** *** 144,148 **** Say Y here if you want suspend key events to trigger a user requested suspend through APM. This is useful on embedded ! systems where such behviour is desired without userspace interaction. If unsure, say N. --- 144,148 ---- Say Y here if you want suspend key events to trigger a user requested suspend through APM. This is useful on embedded ! systems where such behaviour is desired without userspace interaction. If unsure, say N. |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
|
Update of /cvsroot/gc-linux/linux/arch/powerpc/boot In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/arch/powerpc/boot Modified Files: Makefile Added Files: wrapper Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/boot/Makefile,v retrieving revision 1.9 retrieving revision 1.10 diff -C2 -d -r1.9 -r1.10 *** Makefile 25 Oct 2009 18:33:46 -0000 1.9 --- Makefile 25 Oct 2009 18:45:35 -0000 1.10 *************** *** 34,38 **** endif ! BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt DTS_FLAGS ?= -p 1024 --- 34,38 ---- endif ! BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) DTS_FLAGS ?= -p 1024 *************** *** 54,60 **** $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader)) ! src-libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \ ! $(addprefix libfdt/,$(src-libfdt)) libfdt-wrapper.c \ ns16550.c serial.c simple_alloc.c div64.S util.S \ gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ --- 54,65 ---- $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader)) ! libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c ! libfdtheader := fdt.h libfdt.h libfdt_internal.h ! ! $(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o): \ ! $(addprefix $(obj)/,$(libfdtheader)) ! src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \ ! $(libfdt) libfdt-wrapper.c \ ns16550.c serial.c simple_alloc.c div64.S util.S \ gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ *************** *** 71,75 **** cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ ! cuboot-acadia.c src-boot := $(src-wlib) $(src-plat) empty.c --- 76,80 ---- cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ ! cuboot-acadia.c cuboot-amigaone.c src-boot := $(src-wlib) $(src-plat) empty.c *************** *** 97,100 **** --- 102,111 ---- $(call cmd,copy_zliblinuxheader) + quiet_cmd_copy_libfdt = COPY $@ + cmd_copy_libfdt = cp $< $@ + + $(addprefix $(obj)/,$(libfdt) $(libfdtheader)): $(obj)/%: $(srctree)/scripts/dtc/libfdt/% + $(call cmd,copy_libfdt) + $(obj)/empty.c: @touch $@ *************** *** 104,107 **** --- 115,119 ---- clean-files := $(zlib) $(zlibheader) $(zliblinuxheader) \ + $(libfdt) $(libfdtheader) \ empty.c zImage.coff.lds zImage.ps3.lds zImage.lds *************** *** 115,118 **** --- 127,132 ---- cmd_bootar = $(CROSS32AR) -cr $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@ + $(obj-libfdt): $(obj)/%.o: $(srctree)/scripts/dtc/libfdt/%.c FORCE + $(call if_changed_dep,bootcc) $(patsubst %.c,%.o, $(filter %.c, $(src-boot))): %.o: %.c FORCE $(Q)mkdir -p $(dir $@) *************** *** 125,129 **** $(call if_changed,bootar) ! hostprogs-y := addnote addRamDisk hack-coff mktree dtc targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a) --- 139,143 ---- $(call if_changed,bootar) ! hostprogs-y := addnote addRamDisk hack-coff mktree targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a) *************** *** 134,178 **** wrapper :=$(srctree)/$(src)/wrapper ! wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree dtc) \ $(wrapper) FORCE ############# - # Bits for building dtc - # DTC_GENPARSER := 1 # Uncomment to rebuild flex/bison output - - dtc-objs := dtc.o flattree.o fstree.o data.o livetree.o treesource.o srcpos.o checks.o - dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o - dtc-objs := $(addprefix dtc-src/, $(dtc-objs)) - - # prerequisites on generated files needs to be explicit - $(obj)/dtc-src/dtc-parser.tab.o: $(obj)/dtc-src/dtc-parser.tab.c $(obj)/dtc-src/dtc-parser.tab.h - $(obj)/dtc-src/dtc-lexer.lex.o: $(obj)/dtc-src/dtc-lexer.lex.c $(obj)/dtc-src/dtc-parser.tab.h - - HOSTCFLAGS += -I$(src)/dtc-src/ -I$(src)/libfdt/ - - targets += dtc-src/dtc-parser.tab.c - targets += dtc-src/dtc-lexer.lex.c - - clean-files += dtc-src/dtc-parser.tab.h - - ifdef DTC_GENPARSER - BISON = bison - FLEX = flex - - quiet_cmd_bison = BISON $@ - cmd_bison = $(BISON) -o$@ -d $<; cp $@ $@_shipped - quiet_cmd_flex = FLEX $@ - cmd_flex = $(FLEX) -o$@ $<; cp $@ $@_shipped - - $(obj)/dtc-src/dtc-parser.tab.c: $(src)/dtc-src/dtc-parser.y FORCE - $(call if_changed,bison) - - $(obj)/dtc-src/dtc-parser.tab.h: $(obj)/dtc-src/dtc-parser.tab.c - - $(obj)/dtc-src/dtc-lexer.lex.c: $(src)/dtc-src/dtc-lexer.l FORCE - $(call if_changed,flex) - endif - - ############# # Bits for building various flavours of zImage --- 148,155 ---- wrapper :=$(srctree)/$(src)/wrapper ! wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree) \ $(wrapper) FORCE ############# # Bits for building various flavours of zImage *************** *** 236,240 **** # Board ports in arch/powerpc/platform/52xx/Kconfig ! image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 cuImage.lite5200b # Board ports in arch/powerpc/platform/82xx/Kconfig --- 213,219 ---- # Board ports in arch/powerpc/platform/52xx/Kconfig ! image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 lite5200.dtb ! image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200b lite5200b.dtb ! image-$(CONFIG_PPC_MEDIA5200) += cuImage.media5200 media5200.dtb # Board ports in arch/powerpc/platform/82xx/Kconfig *************** *** 275,278 **** --- 254,260 ---- image-$(CONFIG_PPC_C2K) += cuImage.c2k + # Board port in arch/powerpc/platform/amigaone/Kconfig + image-$(CONFIG_AMIGAONE) += cuImage.amigaone + # For 32-bit powermacs, build the COFF and miboot images # as well as the ELF images. *************** *** 343,348 **** # Rule to build device tree blobs ! $(obj)/%.dtb: $(dtstree)/%.dts $(obj)/dtc ! $(obj)/dtc -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts # If there isn't a platform selected then just strip the vmlinux. --- 325,332 ---- # Rule to build device tree blobs ! DTC = $(objtree)/scripts/dtc/dtc ! ! $(obj)/%.dtb: $(dtstree)/%.dts ! $(DTC) -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts # If there isn't a platform selected then just strip the vmlinux. *************** *** 363,367 **** zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \ zImage.iseries zImage.miboot zImage.pmac zImage.pseries \ ! otheros.bld *.dtb # clean up files cached by wrapper --- 347,351 ---- zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \ zImage.iseries zImage.miboot zImage.pmac zImage.pseries \ ! simpleImage.* otheros.bld *.dtb # clean up files cached by wrapper --- NEW FILE: wrapper --- #!/bin/sh # Copyright (C) 2006 Paul Mackerras, IBM Corporation <pa...@sa...> # This program may be used under the terms of version 2 of the GNU # General Public License. # This script takes a kernel binary and optionally an initrd image # and/or a device-tree blob, and creates a bootable zImage for a # given platform. # Options: # -o zImage specify output file # -p platform specify platform (links in $platform.o) # -i initrd specify initrd file # -d devtree specify device-tree blob # -s tree.dts specify device-tree source file (needs dtc installed) # -c cache $kernel.strip.gz (use if present & newer, else make) # -C prefix specify command prefix for cross-building tools # (strip, objcopy, ld) # -D dir specify directory containing data files used by script # (default ./arch/powerpc/boot) # -W dir specify working directory for temporary files (default .) # Stop execution if any command fails set -e # Allow for verbose output if [ "$V" = 1 ]; then set -x fi # defaults kernel= ofile=zImage platform=of initrd= dtb= dts= cacheit= binary= gzip=.gz # cross-compilation prefix CROSS= # directory for object and other files used by this script object=arch/powerpc/boot objbin=$object # directory for working files tmpdir=. usage() { echo 'Usage: wrapper [-o output] [-p platform] [-i initrd]' >&2 echo ' [-d devtree] [-s tree.dts] [-c] [-C cross-prefix]' >&2 echo ' [-D datadir] [-W workingdir] [--no-gzip] [vmlinux]' >&2 exit 1 } while [ "$#" -gt 0 ]; do case "$1" in -o) shift [ "$#" -gt 0 ] || usage ofile="$1" ;; -p) shift [ "$#" -gt 0 ] || usage platform="$1" ;; -i) shift [ "$#" -gt 0 ] || usage initrd="$1" ;; -d) shift [ "$#" -gt 0 ] || usage dtb="$1" ;; -s) shift [ "$#" -gt 0 ] || usage dts="$1" ;; -c) cacheit=y ;; -C) shift [ "$#" -gt 0 ] || usage CROSS="$1" ;; -D) shift [ "$#" -gt 0 ] || usage object="$1" objbin="$1" ;; -W) shift [ "$#" -gt 0 ] || usage tmpdir="$1" ;; --no-gzip) gzip= ;; -?) usage ;; *) [ -z "$kernel" ] || usage kernel="$1" ;; esac shift done if [ -n "$dts" ]; then if [ ! -r "$dts" -a -r "$object/dts/$dts" ]; then dts="$object/dts/$dts" fi if [ -z "$dtb" ]; then dtb="$platform.dtb" fi $object/dtc -O dtb -o "$dtb" -b 0 "$dts" fi if [ -z "$kernel" ]; then kernel=vmlinux fi platformo=$object/"$platform".o lds=$object/zImage.lds ext=strip objflags=-S tmp=$tmpdir/zImage.$$.o ksection=.kernel:vmlinux.strip isection=.kernel:initrd link_address='0x400000' case "$platform" in pseries) platformo=$object/of.o link_address='0x4000000' ;; pmac|chrp) platformo=$object/of.o ;; coff) platformo=$object/of.o lds=$object/zImage.coff.lds link_address='0x500000' ;; miboot|uboot) # miboot and U-boot want just the bare bits, not an ELF binary ext=bin objflags="-O binary" tmp="$ofile" ksection=image isection=initrd ;; cuboot*) binary=y gzip= case "$platform" in *-mpc866ads|*-mpc885ads|*-adder875*|*-ep88xc) platformo=$object/cuboot-8xx.o ;; *5200*|*-motionpro) platformo=$object/cuboot-52xx.o ;; *-pq2fads|*-ep8248e|*-mpc8272*|*-storcenter) platformo=$object/cuboot-pq2.o ;; *-mpc824*) platformo=$object/cuboot-824x.o ;; *-mpc83*|*-asp834x*) platformo=$object/cuboot-83xx.o ;; *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) platformo=$object/cuboot-85xx-cpm2.o ;; *-mpc85*|*-tqm85*|*-sbc85*) platformo=$object/cuboot-85xx.o ;; *-amigaone) link_address='0x800000' ;; esac ;; ps3) platformo="$object/ps3-head.o $object/ps3-hvcall.o $object/ps3.o" lds=$object/zImage.ps3.lds gzip= ext=bin objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data" ksection=.kernel:vmlinux.bin isection=.kernel:initrd link_address='' ;; ep88xc|ep405|ep8248e) platformo="$object/fixed-head.o $object/$platform.o" binary=y ;; adder875-redboot) platformo="$object/fixed-head.o $object/redboot-8xx.o" binary=y ;; simpleboot-virtex405-*) platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o" binary=y ;; simpleboot-virtex440-*) platformo="$object/fixed-head.o $object/simpleboot.o $object/virtex.o" binary=y ;; simpleboot-*) platformo="$object/fixed-head.o $object/simpleboot.o" binary=y ;; asp834x-redboot) platformo="$object/fixed-head.o $object/redboot-83xx.o" binary=y ;; esac vmz="$tmpdir/`basename \"$kernel\"`.$ext" if [ -z "$cacheit" -o ! -f "$vmz$gzip" -o "$vmz$gzip" -ot "$kernel" ]; then ${CROSS}objcopy $objflags "$kernel" "$vmz.$$" if [ -n "$gzip" ]; then gzip -f -9 "$vmz.$$" fi if [ -n "$cacheit" ]; then mv -f "$vmz.$$$gzip" "$vmz$gzip" else vmz="$vmz.$$" fi fi vmz="$vmz$gzip" # Extract kernel version information, some platforms want to include # it in the image header version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \ cut -d' ' -f3` if [ -n "$version" ]; then uboot_version="-n Linux-$version" fi # physical offset of kernel image membase=`${CROSS}objdump -p "$kernel" | grep -m 1 LOAD | awk '{print $7}'` case "$platform" in uboot) rm -f "$ofile" mkimage -A ppc -O linux -T kernel -C gzip -a $membase -e $membase \ $uboot_version -d "$vmz" "$ofile" if [ -z "$cacheit" ]; then rm -f "$vmz" fi exit 0 ;; esac addsec() { ${CROSS}objcopy $4 $1 \ --add-section=$3="$2" \ --set-section-flags=$3=contents,alloc,load,readonly,data } addsec $tmp "$vmz" $ksection $object/empty.o if [ -z "$cacheit" ]; then rm -f "$vmz" fi if [ -n "$initrd" ]; then addsec $tmp "$initrd" $isection fi if [ -n "$dtb" ]; then addsec $tmp "$dtb" .kernel:dtb if [ -n "$dts" ]; then rm $dtb fi fi if [ "$platform" != "miboot" ]; then if [ -n "$link_address" ] ; then text_start="-Ttext $link_address --defsym _start=$link_address" fi ${CROSS}ld -m elf32ppc -T $lds $text_start -o "$ofile" \ $platformo $tmp $object/wrapper.a rm $tmp fi # Some platforms need the zImage's entry point and base address base=0x`${CROSS}nm "$ofile" | grep ' _start$' | cut -d' ' -f1` entry=`${CROSS}objdump -f "$ofile" | grep '^start address ' | cut -d' ' -f3` if [ -n "$binary" ]; then mv "$ofile" "$ofile".elf ${CROSS}objcopy -O binary "$ofile".elf "$ofile" fi # post-processing needed for some platforms case "$platform" in pseries|chrp) $objbin/addnote "$ofile" ;; coff) ${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile" $objbin/hack-coff "$ofile" ;; cuboot*) gzip -f -9 "$ofile" mkimage -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \ $uboot_version -d "$ofile".gz "$ofile" ;; treeboot*) mv "$ofile" "$ofile.elf" $objbin/mktree "$ofile.elf" "$ofile" "$base" "$entry" if [ -z "$cacheit" ]; then rm -f "$ofile.elf" fi exit 0 ;; ps3) # The ps3's loader supports loading a gzipped binary image from flash # rom to ram addr zero. The loader then enters the system reset # vector at addr 0x100. A bootwrapper overlay is used to arrange for # a binary image of the kernel to be at addr zero, and yet have a # suitable bootwrapper entry at 0x100. To construct the final rom # image 512 bytes from offset 0x100 is copied to the bootwrapper # place holder at symbol __system_reset_kernel. The 512 bytes of the # bootwrapper entry code at symbol __system_reset_overlay is then # copied to offset 0x100. At runtime the bootwrapper program copies # the data at __system_reset_kernel back to addr 0x100. system_reset_overlay=0x`${CROSS}nm "$ofile" \ | grep ' __system_reset_overlay$' \ | cut -d' ' -f1` system_reset_overlay=`printf "%d" $system_reset_overlay` system_reset_kernel=0x`${CROSS}nm "$ofile" \ | grep ' __system_reset_kernel$' \ | cut -d' ' -f1` system_reset_kernel=`printf "%d" $system_reset_kernel` overlay_dest="256" overlay_size="512" ${CROSS}objcopy -O binary "$ofile" "$ofile.bin" dd if="$ofile.bin" of="$ofile.bin" conv=notrunc \ skip=$overlay_dest seek=$system_reset_kernel \ count=$overlay_size bs=1 dd if="$ofile.bin" of="$ofile.bin" conv=notrunc \ skip=$system_reset_overlay seek=$overlay_dest \ count=$overlay_size bs=1 odir="$(dirname "$ofile.bin")" rm -f "$odir/otheros.bld" gzip --force -9 --stdout "$ofile.bin" > "$odir/otheros.bld" ;; esac |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
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Update of /cvsroot/gc-linux/linux/drivers In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers Modified Files: Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/Makefile,v retrieving revision 1.29 retrieving revision 1.30 diff -C2 -d -r1.29 -r1.30 *** Makefile 25 Oct 2009 18:33:46 -0000 1.29 --- Makefile 25 Oct 2009 18:45:35 -0000 1.30 *************** *** 37,47 **** obj-y += serial/ obj-$(CONFIG_PARPORT) += parport/ ! obj-y += base/ block/ misc/ mfd/ net/ media/ obj-$(CONFIG_NUBUS) += nubus/ - obj-$(CONFIG_ATM) += atm/ obj-y += macintosh/ obj-$(CONFIG_IDE) += ide/ obj-$(CONFIG_SCSI) += scsi/ obj-$(CONFIG_ATA) += ata/ obj-$(CONFIG_FUSION) += message/ obj-$(CONFIG_FIREWIRE) += firewire/ --- 37,48 ---- obj-y += serial/ obj-$(CONFIG_PARPORT) += parport/ ! obj-y += base/ block/ misc/ mfd/ obj-$(CONFIG_NUBUS) += nubus/ obj-y += macintosh/ obj-$(CONFIG_IDE) += ide/ obj-$(CONFIG_SCSI) += scsi/ obj-$(CONFIG_ATA) += ata/ + obj-y += net/ + obj-$(CONFIG_ATM) += atm/ obj-$(CONFIG_FUSION) += message/ obj-$(CONFIG_FIREWIRE) += firewire/ *************** *** 71,75 **** obj-$(CONFIG_I2O) += message/ obj-$(CONFIG_RTC_LIB) += rtc/ ! obj-y += i2c/ obj-$(CONFIG_W1) += w1/ obj-$(CONFIG_POWER_SUPPLY) += power/ --- 72,76 ---- obj-$(CONFIG_I2O) += message/ obj-$(CONFIG_RTC_LIB) += rtc/ ! obj-y += i2c/ media/ obj-$(CONFIG_W1) += w1/ obj-$(CONFIG_POWER_SUPPLY) += power/ |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
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Update of /cvsroot/gc-linux/linux/include/linux In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/include/linux Modified Files: fb.h Added Files: kexec.h Log Message: Forward to v.2.6.30. --- NEW FILE: kexec.h --- #ifndef LINUX_KEXEC_H #define LINUX_KEXEC_H #ifdef CONFIG_KEXEC #include <linux/types.h> #include <linux/list.h> #include <linux/linkage.h> #include <linux/compat.h> #include <linux/ioport.h> #include <linux/elfcore.h> #include <linux/elf.h> #include <asm/kexec.h> /* Verify architecture specific macros are defined */ #ifndef KEXEC_SOURCE_MEMORY_LIMIT #error KEXEC_SOURCE_MEMORY_LIMIT not defined #endif #ifndef KEXEC_DESTINATION_MEMORY_LIMIT #error KEXEC_DESTINATION_MEMORY_LIMIT not defined #endif #ifndef KEXEC_CONTROL_MEMORY_LIMIT #error KEXEC_CONTROL_MEMORY_LIMIT not defined #endif #ifndef KEXEC_CONTROL_PAGE_SIZE #error KEXEC_CONTROL_PAGE_SIZE not defined #endif #ifndef KEXEC_ARCH #error KEXEC_ARCH not defined #endif #define KEXEC_NOTE_HEAD_BYTES ALIGN(sizeof(struct elf_note), 4) #define KEXEC_CORE_NOTE_NAME "CORE" #define KEXEC_CORE_NOTE_NAME_BYTES ALIGN(sizeof(KEXEC_CORE_NOTE_NAME), 4) #define KEXEC_CORE_NOTE_DESC_BYTES ALIGN(sizeof(struct elf_prstatus), 4) /* * The per-cpu notes area is a list of notes terminated by a "NULL" * note header. For kdump, the code in vmcore.c runs in the context * of the second kernel to combine them into one note. */ #define KEXEC_NOTE_BYTES ( (KEXEC_NOTE_HEAD_BYTES * 2) + \ KEXEC_CORE_NOTE_NAME_BYTES + \ KEXEC_CORE_NOTE_DESC_BYTES ) /* * This structure is used to hold the arguments that are used when loading * kernel binaries. */ typedef unsigned long kimage_entry_t; #define IND_DESTINATION 0x1 #define IND_INDIRECTION 0x2 #define IND_DONE 0x4 #define IND_SOURCE 0x8 #define KEXEC_SEGMENT_MAX 16 struct kexec_segment { void __user *buf; size_t bufsz; unsigned long mem; /* User space sees this as a (void *) ... */ size_t memsz; }; #ifdef CONFIG_COMPAT struct compat_kexec_segment { compat_uptr_t buf; compat_size_t bufsz; compat_ulong_t mem; /* User space sees this as a (void *) ... */ compat_size_t memsz; }; #endif struct kimage { kimage_entry_t head; kimage_entry_t *entry; kimage_entry_t *last_entry; unsigned long destination; unsigned long start; struct page *control_code_page; struct page *swap_page; unsigned long nr_segments; struct kexec_segment segment[KEXEC_SEGMENT_MAX]; struct list_head control_pages; struct list_head dest_pages; struct list_head unuseable_pages; /* Address of next control page to allocate for crash kernels. */ unsigned long control_page; /* Flags to indicate special processing */ unsigned int type : 1; #define KEXEC_TYPE_DEFAULT 0 #define KEXEC_TYPE_CRASH 1 unsigned int preserve_context : 1; #ifdef ARCH_HAS_KIMAGE_ARCH struct kimage_arch arch; #endif }; /* kexec interface functions */ extern void machine_kexec(struct kimage *image); extern int machine_kexec_prepare(struct kimage *image); extern void machine_kexec_cleanup(struct kimage *image); extern asmlinkage long sys_kexec_load(unsigned long entry, unsigned long nr_segments, struct kexec_segment __user *segments, unsigned long flags); extern int kernel_kexec(void); #ifdef CONFIG_COMPAT extern asmlinkage long compat_sys_kexec_load(unsigned long entry, unsigned long nr_segments, struct compat_kexec_segment __user *segments, unsigned long flags); #endif extern struct page *kimage_alloc_control_pages(struct kimage *image, unsigned int order); extern void crash_kexec(struct pt_regs *); int kexec_should_crash(struct task_struct *); void crash_save_cpu(struct pt_regs *regs, int cpu); void crash_save_vmcoreinfo(void); void arch_crash_save_vmcoreinfo(void); void vmcoreinfo_append_str(const char *fmt, ...) __attribute__ ((format (printf, 1, 2))); unsigned long paddr_vmcoreinfo_note(void); #define VMCOREINFO_OSRELEASE(value) \ vmcoreinfo_append_str("OSRELEASE=%s\n", value) #define VMCOREINFO_PAGESIZE(value) \ vmcoreinfo_append_str("PAGESIZE=%ld\n", value) #define VMCOREINFO_SYMBOL(name) \ vmcoreinfo_append_str("SYMBOL(%s)=%lx\n", #name, (unsigned long)&name) #define VMCOREINFO_SIZE(name) \ vmcoreinfo_append_str("SIZE(%s)=%lu\n", #name, \ (unsigned long)sizeof(name)) #define VMCOREINFO_STRUCT_SIZE(name) \ vmcoreinfo_append_str("SIZE(%s)=%lu\n", #name, \ (unsigned long)sizeof(struct name)) #define VMCOREINFO_OFFSET(name, field) \ vmcoreinfo_append_str("OFFSET(%s.%s)=%lu\n", #name, #field, \ (unsigned long)offsetof(struct name, field)) #define VMCOREINFO_LENGTH(name, value) \ vmcoreinfo_append_str("LENGTH(%s)=%lu\n", #name, (unsigned long)value) #define VMCOREINFO_NUMBER(name) \ vmcoreinfo_append_str("NUMBER(%s)=%ld\n", #name, (long)name) #define VMCOREINFO_CONFIG(name) \ vmcoreinfo_append_str("CONFIG_%s=y\n", #name) extern struct kimage *kexec_image; extern struct kimage *kexec_crash_image; #ifndef kexec_flush_icache_page #define kexec_flush_icache_page(page) #endif #define KEXEC_ON_CRASH 0x00000001 #define KEXEC_PRESERVE_CONTEXT 0x00000002 #define KEXEC_ARCH_MASK 0xffff0000 /* These values match the ELF architecture values. * Unless there is a good reason that should continue to be the case. */ #define KEXEC_ARCH_DEFAULT ( 0 << 16) #define KEXEC_ARCH_386 ( 3 << 16) #define KEXEC_ARCH_X86_64 (62 << 16) #define KEXEC_ARCH_PPC (20 << 16) #define KEXEC_ARCH_PPC64 (21 << 16) #define KEXEC_ARCH_IA_64 (50 << 16) #define KEXEC_ARCH_ARM (40 << 16) #define KEXEC_ARCH_S390 (22 << 16) #define KEXEC_ARCH_SH (42 << 16) #define KEXEC_ARCH_MIPS_LE (10 << 16) #define KEXEC_ARCH_MIPS ( 8 << 16) /* List of defined/legal kexec flags */ #ifndef CONFIG_KEXEC_JUMP #define KEXEC_FLAGS KEXEC_ON_CRASH #else #define KEXEC_FLAGS (KEXEC_ON_CRASH | KEXEC_PRESERVE_CONTEXT) #endif #define VMCOREINFO_BYTES (4096) #define VMCOREINFO_NOTE_NAME "VMCOREINFO" #define VMCOREINFO_NOTE_NAME_BYTES ALIGN(sizeof(VMCOREINFO_NOTE_NAME), 4) #define VMCOREINFO_NOTE_SIZE (KEXEC_NOTE_HEAD_BYTES*2 + VMCOREINFO_BYTES \ + VMCOREINFO_NOTE_NAME_BYTES) /* Location of a reserved region to hold the crash kernel. */ extern struct resource crashk_res; typedef u32 note_buf_t[KEXEC_NOTE_BYTES/4]; extern note_buf_t *crash_notes; extern u32 vmcoreinfo_note[VMCOREINFO_NOTE_SIZE/4]; extern size_t vmcoreinfo_size; extern size_t vmcoreinfo_max_size; int __init parse_crashkernel(char *cmdline, unsigned long long system_ram, unsigned long long *crash_size, unsigned long long *crash_base); #else /* !CONFIG_KEXEC */ struct pt_regs; struct task_struct; static inline void crash_kexec(struct pt_regs *regs) { } static inline int kexec_should_crash(struct task_struct *p) { return 0; } #endif /* CONFIG_KEXEC */ #endif /* LINUX_KEXEC_H */ Index: fb.h =================================================================== RCS file: /cvsroot/gc-linux/linux/include/linux/fb.h,v retrieving revision 1.33 retrieving revision 1.34 diff -C2 -d -r1.33 -r1.34 *** fb.h 25 Oct 2009 18:33:47 -0000 1.33 --- fb.h 25 Oct 2009 18:45:36 -0000 1.34 *************** *** 124,127 **** --- 124,128 ---- #define FB_ACCEL_TRIDENT_BLADE3D 52 /* Trident Blade3D */ #define FB_ACCEL_TRIDENT_BLADEXP 53 /* Trident BladeXP */ + #define FB_ACCEL_CIRRUS_ALPINE 53 /* Cirrus Logic 543x/544x/5480 */ #define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */ #define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */ *************** *** 173,178 **** * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you * can use the offset as right argument to <<). A pixel afterwards is a bit ! * stream and is written to video memory as that unmodified. This implies ! * big-endian byte order if bits_per_pixel is greater than 8. */ struct fb_bitfield { --- 174,183 ---- * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you * can use the offset as right argument to <<). A pixel afterwards is a bit ! * stream and is written to video memory as that unmodified. ! * ! * For pseudocolor: offset and length should be the same for all color ! * components. Offset specifies the position of the least significant bit ! * of the pallette index in a pixel value. Length indicates the number ! * of available palette entries (i.e. # of entries = 1 << length). */ struct fb_bitfield { *************** *** 961,973 **** extern struct class *fb_class; ! static inline int lock_fb_info(struct fb_info *info) ! { ! mutex_lock(&info->lock); ! if (!info->fbops) { ! mutex_unlock(&info->lock); ! return 0; ! } ! return 1; ! } static inline void unlock_fb_info(struct fb_info *info) --- 966,970 ---- extern struct class *fb_class; ! extern int lock_fb_info(struct fb_info *info); static inline void unlock_fb_info(struct fb_info *info) |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
|
Update of /cvsroot/gc-linux/linux/drivers/rtc In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/rtc Modified Files: Kconfig Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/rtc/Makefile,v retrieving revision 1.7 retrieving revision 1.8 diff -C2 -d -r1.7 -r1.8 *** Makefile 25 Oct 2009 18:33:47 -0000 1.7 --- Makefile 25 Oct 2009 18:45:36 -0000 1.8 *************** *** 37,40 **** --- 37,41 ---- obj-$(CONFIG_RTC_DRV_DS1742) += rtc-ds1742.o obj-$(CONFIG_RTC_DRV_DS3234) += rtc-ds3234.o + obj-$(CONFIG_RTC_DRV_EFI) += rtc-efi.o obj-$(CONFIG_RTC_DRV_EP93XX) += rtc-ep93xx.o obj-$(CONFIG_RTC_DRV_FM3130) += rtc-fm3130.o *************** *** 56,61 **** obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o ! obj-$(CONFIG_RTC_DRV_PARISC) += rtc-parisc.o ! obj-$(CONFIG_RTC_DRV_PPC) += rtc-ppc.o obj-$(CONFIG_RTC_DRV_PXA) += rtc-pxa.o obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o --- 57,61 ---- obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o ! obj-$(CONFIG_RTC_DRV_GENERIC) += rtc-generic.o obj-$(CONFIG_RTC_DRV_PXA) += rtc-pxa.o obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o *************** *** 77,78 **** --- 77,79 ---- obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o + obj-$(CONFIG_RTC_DRV_PS3) += rtc-ps3.o Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/rtc/Kconfig,v retrieving revision 1.7 retrieving revision 1.8 diff -C2 -d -r1.7 -r1.8 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.7 --- Kconfig 25 Oct 2009 18:45:36 -0000 1.8 *************** *** 130,140 **** config RTC_DRV_DS1307 ! tristate "Dallas/Maxim DS1307/37/38/39/40, ST M41T00" help If you say yes here you get support for various compatible RTC chips (often with battery backup) connected with I2C. This driver should handle DS1307, DS1337, DS1338, DS1339, DS1340, ST M41T00, ! and probably other chips. In some cases the RTC must already ! have been initialized (by manufacturing or a bootloader). The first seven registers on these chips hold an RTC, and other --- 130,141 ---- config RTC_DRV_DS1307 ! tristate "Dallas/Maxim DS1307/37/38/39/40, ST M41T00, EPSON RX-8025" help If you say yes here you get support for various compatible RTC chips (often with battery backup) connected with I2C. This driver should handle DS1307, DS1337, DS1338, DS1339, DS1340, ST M41T00, ! EPSON RX-8025 and probably other chips. In some cases the RTC ! must already have been initialized (by manufacturing or a ! bootloader). The first seven registers on these chips hold an RTC, and other *************** *** 225,233 **** config RTC_DRV_M41T80 ! tristate "ST M41T65/M41T80/81/82/83/84/85/87" help If you say Y here you will get support for the ST M41T60 and M41T80 RTC chips series. Currently, the following chips are ! supported: M41T65, M41T80, M41T81, M41T82, M41T83, M41ST84, M41ST85, and M41ST87. --- 226,234 ---- config RTC_DRV_M41T80 ! tristate "ST M41T62/65/M41T80/81/82/83/84/85/87" help If you say Y here you will get support for the ST M41T60 and M41T80 RTC chips series. Currently, the following chips are ! supported: M41T62, M41T65, M41T80, M41T81, M41T82, M41T83, M41ST84, M41ST85, and M41ST87. *************** *** 441,444 **** --- 442,455 ---- will be called rtc-ds1742. + config RTC_DRV_EFI + tristate "EFI RTC" + depends on IA64 + help + If you say yes here you will get support for the EFI + Real Time Clock. + + This driver can also be built as a module. If so, the module + will be called rtc-efi. + config RTC_DRV_STK17TA8 tristate "Simtek STK17TA8" *************** *** 563,567 **** config RTC_DRV_SH tristate "SuperH On-Chip RTC" ! depends on RTC_CLASS && SUPERH help Say Y here to enable support for the on-chip RTC found in --- 574,578 ---- config RTC_DRV_SH tristate "SuperH On-Chip RTC" ! depends on RTC_CLASS && SUPERH && HAVE_CLK help Say Y here to enable support for the on-chip RTC found in *************** *** 678,697 **** If you say yes here you get support for the Ricoh RS5C313 RTC chips. ! config RTC_DRV_PARISC ! tristate "PA-RISC firmware RTC support" ! depends on PARISC help ! Say Y or M here to enable RTC support on PA-RISC systems using ! firmware calls. If you do not know what you are doing, you should just say Y. - config RTC_DRV_PPC - tristate "PowerPC machine dependent RTC support" - depends on PPC - help - The PowerPC kernel has machine-specific functions for accessing - the RTC. This exposes that functionality through the generic RTC - class. - config RTC_DRV_PXA tristate "PXA27x/PXA3xx" --- 689,702 ---- If you say yes here you get support for the Ricoh RS5C313 RTC chips. ! config RTC_DRV_GENERIC ! tristate "Generic RTC support" ! # Please consider writing a new RTC driver instead of using the generic ! # RTC abstraction ! depends on PARISC || M68K || PPC help ! Say Y or M here to enable RTC support on systems using the generic ! RTC abstraction. If you do not know what you are doing, you should just say Y. config RTC_DRV_PXA tristate "PXA27x/PXA3xx" *************** *** 737,739 **** --- 742,753 ---- will be called rtc-mv. + config RTC_DRV_PS3 + tristate "PS3 RTC" + depends on PPC_PS3 + help + If you say yes here you will get support for the RTC on PS3. + + This driver can also be built as a module. If so, the module + will be called rtc-ps3. + endif # RTC_CLASS |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
|
Update of /cvsroot/gc-linux/linux/arch/powerpc/platforms/embedded6xx In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/arch/powerpc/platforms/embedded6xx Modified Files: Kconfig Log Message: Forward to v.2.6.30. Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/platforms/embedded6xx/Kconfig,v retrieving revision 1.8 retrieving revision 1.9 diff -C2 -d -r1.8 -r1.9 *** Kconfig 25 Oct 2009 18:33:46 -0000 1.8 --- Kconfig 25 Oct 2009 18:45:35 -0000 1.9 *************** *** 1,5 **** config EMBEDDED6xx bool "Embedded 6xx/7xx/7xxx-based boards" ! depends on PPC32 && BROKEN_ON_SMP && PPC_MULTIPLATFORM config LINKSTATION --- 1,5 ---- config EMBEDDED6xx bool "Embedded 6xx/7xx/7xxx-based boards" ! depends on 6xx && BROKEN_ON_SMP config LINKSTATION |
From: Albert H. <he...@us...> - 2009-10-25 18:45:44
|
Update of /cvsroot/gc-linux/linux/drivers/serial In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/drivers/serial Modified Files: Kconfig Makefile Log Message: Forward to v.2.6.30. Index: Makefile =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/serial/Makefile,v retrieving revision 1.7 retrieving revision 1.8 diff -C2 -d -r1.7 -r1.8 *** Makefile 25 Oct 2009 18:33:47 -0000 1.7 --- Makefile 25 Oct 2009 18:45:36 -0000 1.8 *************** *** 44,47 **** --- 44,48 ---- obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o + obj-$(CONFIG_SERIAL_MAX3100) += max3100.o obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o obj-$(CONFIG_SERIAL_MUX) += mux.o Index: Kconfig =================================================================== RCS file: /cvsroot/gc-linux/linux/drivers/serial/Kconfig,v retrieving revision 1.8 retrieving revision 1.9 diff -C2 -d -r1.8 -r1.9 *** Kconfig 25 Oct 2009 18:33:47 -0000 1.8 --- Kconfig 25 Oct 2009 18:45:36 -0000 1.9 *************** *** 534,537 **** --- 534,544 ---- SoCs + config SERIAL_MAX3100 + tristate "MAX3100 support" + depends on SPI + select SERIAL_CORE + help + MAX3100 chip support + config SERIAL_DZ bool "DECstation DZ serial driver" *************** *** 629,633 **** config SERIAL_PXA bool "PXA serial port support" ! depends on ARM && ARCH_PXA select SERIAL_CORE help --- 636,640 ---- config SERIAL_PXA bool "PXA serial port support" ! depends on ARCH_PXA || ARCH_MMP select SERIAL_CORE help *************** *** 701,705 **** config SERIAL_BFIN_DMA bool "DMA mode" ! depends on !DMA_UNCACHED_NONE && !KGDB_UART help This driver works under DMA mode. If this option is selected, the --- 708,712 ---- config SERIAL_BFIN_DMA bool "DMA mode" ! depends on !DMA_UNCACHED_NONE && KGDB_SERIAL_CONSOLE=n help This driver works under DMA mode. If this option is selected, the *************** *** 728,744 **** config UART0_CTS_PIN int "UART0 CTS pin" ! depends on BFIN_UART0_CTSRTS default 23 help The default pin is GPIO_GP7. ! Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. config UART0_RTS_PIN int "UART0 RTS pin" ! depends on BFIN_UART0_CTSRTS default 22 help The default pin is GPIO_GP6. ! Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. config SERIAL_BFIN_UART1 --- 735,751 ---- config UART0_CTS_PIN int "UART0 CTS pin" ! depends on BFIN_UART0_CTSRTS && !BF548 default 23 help The default pin is GPIO_GP7. ! Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config UART0_RTS_PIN int "UART0 RTS pin" ! depends on BFIN_UART0_CTSRTS && !BF548 default 22 help The default pin is GPIO_GP6. ! Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config SERIAL_BFIN_UART1 *************** *** 757,775 **** config UART1_CTS_PIN int "UART1 CTS pin" ! depends on BFIN_UART1_CTSRTS && !BF54x default -1 help ! Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. config UART1_RTS_PIN int "UART1 RTS pin" ! depends on BFIN_UART1_CTSRTS && !BF54x default -1 help ! Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. config SERIAL_BFIN_UART2 bool "Enable UART2" ! depends on SERIAL_BFIN && (BF54x) help Enable UART2 --- 764,782 ---- config UART1_CTS_PIN int "UART1 CTS pin" ! depends on BFIN_UART1_CTSRTS && !BF548 default -1 help ! Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config UART1_RTS_PIN int "UART1 RTS pin" ! depends on BFIN_UART1_CTSRTS && !BF548 default -1 help ! Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config SERIAL_BFIN_UART2 bool "Enable UART2" ! depends on SERIAL_BFIN && (BF54x || BF538 || BF539) help Enable UART2 *************** *** 784,798 **** config UART2_CTS_PIN int "UART2 CTS pin" ! depends on BFIN_UART2_CTSRTS default -1 help ! Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. config UART2_RTS_PIN int "UART2 RTS pin" ! depends on BFIN_UART2_CTSRTS default -1 help ! Refer to ./include/asm-blackfin/gpio.h to see the GPIO map. config SERIAL_BFIN_UART3 --- 791,805 ---- config UART2_CTS_PIN int "UART2 CTS pin" ! depends on BFIN_UART2_CTSRTS && !BF548 default -1 help ! Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config UART2_RTS_PIN int "UART2 RTS pin" ! depends on BFIN_UART2_CTSRTS && !BF548 default -1 help ! Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. config SERIAL_BFIN_UART3 *************** *** 809,812 **** --- 816,833 ---- signal. + config UART3_CTS_PIN + int "UART3 CTS pin" + depends on BFIN_UART3_CTSRTS && !BF548 + default -1 + help + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. + + config UART3_RTS_PIN + int "UART3 RTS pin" + depends on BFIN_UART3_CTSRTS && !BF548 + default -1 + help + Refer to arch/blackfin/mach-*/include/mach/gpio.h to see the GPIO map. + config SERIAL_IMX bool "IMX serial port support" *************** *** 834,838 **** config SERIAL_UARTLITE tristate "Xilinx uartlite serial port support" ! depends on PPC32 select SERIAL_CORE help --- 855,859 ---- config SERIAL_UARTLITE tristate "Xilinx uartlite serial port support" ! depends on PPC32 || MICROBLAZE select SERIAL_CORE help *************** *** 1320,1324 **** config SERIAL_OF_PLATFORM tristate "Serial port on Open Firmware platform bus" ! depends on PPC_OF depends on SERIAL_8250 || SERIAL_OF_PLATFORM_NWPSERIAL help --- 1341,1345 ---- config SERIAL_OF_PLATFORM tristate "Serial port on Open Firmware platform bus" ! depends on PPC_OF || MICROBLAZE depends on SERIAL_8250 || SERIAL_OF_PLATFORM_NWPSERIAL help *************** *** 1375,1379 **** select SERIAL_CORE help ! Enble support SPORT emulate UART on Blackfin series. To compile this driver as a module, choose M here: the --- 1396,1400 ---- select SERIAL_CORE help ! Enable SPORT emulate UART on Blackfin series. To compile this driver as a module, choose M here: the |
From: Albert H. <he...@us...> - 2009-10-25 18:45:43
|
Update of /cvsroot/gc-linux/linux/arch/powerpc/include/asm In directory ddv4jf1.ch3.sourceforge.com:/tmp/cvs-serv29988/arch/powerpc/include/asm Modified Files: udbg.h Added Files: dma-mapping.h Log Message: Forward to v.2.6.30. --- NEW FILE: dma-mapping.h --- /* * Copyright (C) 2004 IBM * * Implements the generic device dma API for powerpc. * the pci and vio busses */ #ifndef _ASM_DMA_MAPPING_H #define _ASM_DMA_MAPPING_H #ifdef __KERNEL__ #include <linux/types.h> #include <linux/cache.h> /* need struct page definitions */ #include <linux/mm.h> #include <linux/scatterlist.h> #include <linux/dma-attrs.h> #include <asm/io.h> #define DMA_ERROR_CODE (~(dma_addr_t)0x0) #ifdef CONFIG_NOT_COHERENT_CACHE /* * DMA-consistent mapping functions for PowerPCs that don't support * cache snooping. These allocate/free a region of uncached mapped * memory space for use with DMA devices. Alternatively, you could * allocate the space "normally" and use the cache management functions * to ensure it is consistent. */ struct device; extern void *__dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); extern void __dma_free_coherent(size_t size, void *vaddr); extern void __dma_sync(void *vaddr, size_t size, int direction); extern void __dma_sync_page(struct page *page, unsigned long offset, size_t size, int direction); #else /* ! CONFIG_NOT_COHERENT_CACHE */ /* * Cache coherent cores. */ #define __dma_alloc_coherent(dev, gfp, size, handle) NULL #define __dma_free_coherent(size, addr) ((void)0) #define __dma_sync(addr, size, rw) ((void)0) #define __dma_sync_page(pg, off, sz, rw) ((void)0) #endif /* ! CONFIG_NOT_COHERENT_CACHE */ static inline unsigned long device_to_mask(struct device *dev) { if (dev->dma_mask && *dev->dma_mask) return *dev->dma_mask; /* Assume devices without mask can take 32 bit addresses */ return 0xfffffffful; } /* * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO */ struct dma_mapping_ops { void * (*alloc_coherent)(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag); void (*free_coherent)(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle); int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction, struct dma_attrs *attrs); void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction, struct dma_attrs *attrs); int (*dma_supported)(struct device *dev, u64 mask); int (*set_dma_mask)(struct device *dev, u64 dma_mask); dma_addr_t (*map_page)(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction direction, struct dma_attrs *attrs); void (*unmap_page)(struct device *dev, dma_addr_t dma_address, size_t size, enum dma_data_direction direction, struct dma_attrs *attrs); #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS void (*sync_single_range_for_cpu)(struct device *hwdev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction); void (*sync_single_range_for_device)(struct device *hwdev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction); void (*sync_sg_for_cpu)(struct device *hwdev, struct scatterlist *sg, int nelems, enum dma_data_direction direction); void (*sync_sg_for_device)(struct device *hwdev, struct scatterlist *sg, int nelems, enum dma_data_direction direction); #endif }; /* * Available generic sets of operations */ #ifdef CONFIG_PPC64 extern struct dma_mapping_ops dma_iommu_ops; #endif extern struct dma_mapping_ops dma_direct_ops; static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) { /* We don't handle the NULL dev case for ISA for now. We could * do it via an out of line call but it is not needed for now. The * only ISA DMA device we support is the floppy and we have a hack * in the floppy driver directly to get a device for us. */ if (unlikely(dev == NULL)) return NULL; return dev->archdata.dma_ops; } static inline void set_dma_ops(struct device *dev, struct dma_mapping_ops *ops) { dev->archdata.dma_ops = ops; } static inline int dma_supported(struct device *dev, u64 mask) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); if (unlikely(dma_ops == NULL)) return 0; if (dma_ops->dma_supported == NULL) return 1; return dma_ops->dma_supported(dev, mask); } /* We have our own implementation of pci_set_dma_mask() */ #define HAVE_ARCH_PCI_SET_DMA_MASK static inline int dma_set_mask(struct device *dev, u64 dma_mask) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); if (unlikely(dma_ops == NULL)) return -EIO; if (dma_ops->set_dma_mask != NULL) return dma_ops->set_dma_mask(dev, dma_mask); if (!dev->dma_mask || !dma_supported(dev, dma_mask)) return -EIO; *dev->dma_mask = dma_mask; return 0; } /* * map_/unmap_single actually call through to map/unmap_page now that all the * dma_mapping_ops have been converted over. We just have to get the page and * offset to pass through to map_page */ static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *cpu_addr, size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); return dma_ops->map_page(dev, virt_to_page(cpu_addr), (unsigned long)cpu_addr % PAGE_SIZE, size, direction, attrs); } static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t dma_addr, size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->unmap_page(dev, dma_addr, size, direction, attrs); } static inline dma_addr_t dma_map_page_attrs(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); return dma_ops->map_page(dev, page, offset, size, direction, attrs); } static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t dma_address, size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->unmap_page(dev, dma_address, size, direction, attrs); } static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction, struct dma_attrs *attrs) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); return dma_ops->map_sg(dev, sg, nents, direction, attrs); } static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction, struct dma_attrs *attrs) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs); } static inline void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); return dma_ops->alloc_coherent(dev, size, dma_handle, flag); } static inline void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t dma_handle) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); } static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, size_t size, enum dma_data_direction direction) { return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL); } static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, enum dma_data_direction direction) { dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL); } static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction direction) { return dma_map_page_attrs(dev, page, offset, size, direction, NULL); } static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, enum dma_data_direction direction) { dma_unmap_page_attrs(dev, dma_address, size, direction, NULL); } static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction) { return dma_map_sg_attrs(dev, sg, nents, direction, NULL); } static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction) { dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL); } #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0, size, direction); } static inline void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->sync_single_range_for_device(dev, dma_handle, 0, size, direction); } static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, int nents, enum dma_data_direction direction) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction); } static inline void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sgl, int nents, enum dma_data_direction direction) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->sync_sg_for_device(dev, sgl, nents, direction); } static inline void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->sync_single_range_for_cpu(dev, dma_handle, offset, size, direction); } static inline void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction) { struct dma_mapping_ops *dma_ops = get_dma_ops(dev); BUG_ON(!dma_ops); dma_ops->sync_single_range_for_device(dev, dma_handle, offset, size, direction); } #else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */ static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { } static inline void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { } static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl, int nents, enum dma_data_direction direction) { } static inline void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sgl, int nents, enum dma_data_direction direction) { } static inline void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction) { } static inline void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction) { } #endif static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { #ifdef CONFIG_PPC64 return (dma_addr == DMA_ERROR_CODE); #else return 0; #endif } #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #ifdef CONFIG_NOT_COHERENT_CACHE #define dma_is_consistent(d, h) (0) #else #define dma_is_consistent(d, h) (1) #endif static inline int dma_get_cache_alignment(void) { #ifdef CONFIG_PPC64 /* no easy way to get cache size on all processors, so return * the maximum possible, to be safe */ return (1 << INTERNODE_CACHE_SHIFT); #else /* * Each processor family will define its own L1_CACHE_SHIFT, * L1_CACHE_BYTES wraps to this, so this is always safe. */ return L1_CACHE_BYTES; #endif } static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { BUG_ON(direction == DMA_NONE); __dma_sync(vaddr, size, (int)direction); } #endif /* __KERNEL__ */ #endif /* _ASM_DMA_MAPPING_H */ Index: udbg.h =================================================================== RCS file: /cvsroot/gc-linux/linux/arch/powerpc/include/asm/udbg.h,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -d -r1.3 -r1.4 *** udbg.h 25 Oct 2009 18:33:46 -0000 1.3 --- udbg.h 25 Oct 2009 18:45:35 -0000 1.4 *************** *** 16,19 **** --- 16,20 ---- extern void (*udbg_putc)(char c); + extern void (*udbg_flush)(void); extern int (*udbg_getc)(void); extern int (*udbg_getc_poll)(void); |