ReWrite getting started

After spending a few months looking at how to implement a complete ANSI-C compliance, a rewrite finally appears in order. This allows starting with an ANSI-C compliant grammar.

One goal is to split and restructure the current scope stack logic gating into a one hot for clock enables on local variables and state flow enables, plus a conditional stack for if-then-else, switch/case/default/break, and label/goto blocks.

Another goal is to introduce memories into the architecture, to allow pointers, and larger arrays. This would initially be restricted to multiple bRAM instantiations, then include external memories as a user configurable extension.

Another goal is to map FPGA high level core blocks into the programmers resource space to support C based control of clocks, high speed serial, processor, and other vendor supplied embedded ASIC cores.

Another goal is to restructure the types to properly handle signed, unsigned, and floats in an FPGA specific way allowing use of carry chains, DSP and embedded multiplier blocks based on the target device type.

The last goal is to extend the logic generation code to handle LUTs of any arbitrary size from 2 to small N. Plus better technology mapping, to partition, fit and share logic resources dependent on the target architecture.

If you are interested in helping, let me know.